From 64ce85445c34a7034076abe9843a1f3a35116699 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Wed, 21 Jun 2017 17:08:12 +0800 Subject: [PATCH] drtio: add remote converter SPI example (#740) --- artiq/examples/drtio/device_db.py | 24 +++++++++++++++++++ artiq/examples/drtio/repository/ad9154_spi.py | 24 +++++++++++++++++++ 2 files changed, 48 insertions(+) create mode 100644 artiq/examples/drtio/repository/ad9154_spi.py diff --git a/artiq/examples/drtio/device_db.py b/artiq/examples/drtio/device_db.py index bf64b6df9..1fe17a48a 100644 --- a/artiq/examples/drtio/device_db.py +++ b/artiq/examples/drtio/device_db.py @@ -146,4 +146,28 @@ device_db = { "class": "TTLInOut", "arguments": {"channel": 0x010009} }, + + "converter_spi": { + "type": "local", + "module": "artiq.coredevice.spi", + "class": "NRTSPIMaster", + }, + "ad9154_spi": { + "type": "local", + "module": "artiq.coredevice.ad9154_spi", + "class": "AD9154", + "arguments": {"spi_device": "converter_spi", "chip_select": 1} + }, + "rconverter_spi": { + "type": "local", + "module": "artiq.coredevice.spi", + "class": "NRTSPIMaster", + "arguments": {"busno": 0x010000} + }, + "rad9154_spi": { + "type": "local", + "module": "artiq.coredevice.ad9154_spi", + "class": "AD9154", + "arguments": {"spi_device": "rconverter_spi", "chip_select": 1} + }, } diff --git a/artiq/examples/drtio/repository/ad9154_spi.py b/artiq/examples/drtio/repository/ad9154_spi.py new file mode 100644 index 000000000..b4754c019 --- /dev/null +++ b/artiq/examples/drtio/repository/ad9154_spi.py @@ -0,0 +1,24 @@ +from artiq.coredevice.ad9154_reg import * +from artiq.experiment import * + + +class Test(EnvExperiment): + def build(self): + self.setattr_device("core") + self.setattr_device("ad9154_spi") + self.setattr_device("rad9154_spi") + + @kernel + def run(self): + self.ad9154_spi.setup_bus() + self.rad9154_spi.setup_bus() + + for i in range(5): + self.p("local PRODID: 0x%04x", (self.ad9154_spi.read(AD9154_PRODIDH) << 8) | + self.ad9154_spi.read(AD9154_PRODIDL)) + self.p("remote PRODID: 0x%04x", (self.rad9154_spi.read(AD9154_PRODIDH) << 8) | + self.rad9154_spi.read(AD9154_PRODIDL)) + + def p(self, f, *a): + print(f % a) +