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test.full_stack: add ARTIQ_NO_HARDWARE environment variable

This commit is contained in:
Robert Jördens 2014-11-05 03:47:37 -07:00 committed by Sebastien Bourdeauducq
parent 42accd5de4
commit 62677ed660
1 changed files with 6 additions and 0 deletions

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@ -1,11 +1,15 @@
import unittest import unittest
from operator import itemgetter from operator import itemgetter
import os
from artiq import * from artiq import *
from artiq.coredevice import comm_serial, core, runtime_exceptions, rtio from artiq.coredevice import comm_serial, core, runtime_exceptions, rtio
from artiq.sim import devices as sim_devices from artiq.sim import devices as sim_devices
NO_HARDWARE = bool(os.getenv("ARTIQ_NO_HARDWARE"))
def _run_on_device(k_class, **parameters): def _run_on_device(k_class, **parameters):
with comm_serial.Comm() as comm: with comm_serial.Comm() as comm:
coredev = core.Core(comm) coredev = core.Core(comm)
@ -132,6 +136,7 @@ class _Exceptions(AutoContext):
self.trace.append(104) self.trace.append(104)
@unittest.skipIf(NO_HARDWARE, "no hardware")
class ExecutionCase(unittest.TestCase): class ExecutionCase(unittest.TestCase):
def test_primes(self): def test_primes(self):
l_device, l_host = [], [] l_device, l_host = [], []
@ -203,6 +208,7 @@ class _RTIOSequenceError(AutoContext):
self.o.pulse(25*us) self.o.pulse(25*us)
@unittest.skipIf(NO_HARDWARE, "no hardware")
class RTIOCase(unittest.TestCase): class RTIOCase(unittest.TestCase):
def test_loopback(self): def test_loopback(self):
npulses = 4 npulses = 4