srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

satman: refactor type conversions.

This commit is contained in:
whitequark 2017-02-23 08:59:27 +00:00
parent b34c6ba6b9
commit 623a605d3b
1 changed files with 5 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
artiq/firmware/satman/lib.rs
View File

@ -11,35 +11,16 @@ extern crate logger_artiq;
extern crate board; extern crate board;
extern crate drtioaux; extern crate drtioaux;
// FIXME: is there a better way of doing this?
trait FromU16 {
fn from_u16(v: u16) -> Self;
}
impl FromU16 for u16 {
fn from_u16(v: u16) -> u16 {
v
}
}
impl FromU16 for u8 {
fn from_u16(v: u16) -> u8 {
v as u8
}
}
fn u8_or_u16<T: FromU16>(v: u16) -> T {
FromU16::from_u16(v)
}
fn process_aux_packet(p: &drtioaux::Packet) { fn process_aux_packet(p: &drtioaux::Packet) {
// In the code below, *_chan_sel_write takes an u8 if there are fewer than 256 channels,
// and u16 otherwise; hence the `as _` conversion.
match *p { match *p {
drtioaux::Packet::EchoRequest => drtioaux::hw::send(&drtioaux::Packet::EchoReply).unwrap(), drtioaux::Packet::EchoRequest => drtioaux::hw::send(&drtioaux::Packet::EchoReply).unwrap(),
drtioaux::Packet::MonitorRequest { channel, probe } => { drtioaux::Packet::MonitorRequest { channel, probe } => {
let value; let value;
#[cfg(has_rtio_moninj)] #[cfg(has_rtio_moninj)]
unsafe { unsafe {
board::csr::rtio_moninj::mon_chan_sel_write(u8_or_u16(channel)); board::csr::rtio_moninj::mon_chan_sel_write(channel as _);
board::csr::rtio_moninj::mon_probe_sel_write(probe); board::csr::rtio_moninj::mon_probe_sel_write(probe);
board::csr::rtio_moninj::mon_value_update_write(1); board::csr::rtio_moninj::mon_value_update_write(1);
value = board::csr::rtio_moninj::mon_value_read(); value = board::csr::rtio_moninj::mon_value_read();
@ -54,7 +35,7 @@ fn process_aux_packet(p: &drtioaux::Packet) {
drtioaux::Packet::InjectionRequest { channel, overrd, value } => { drtioaux::Packet::InjectionRequest { channel, overrd, value } => {
#[cfg(has_rtio_moninj)] #[cfg(has_rtio_moninj)]
unsafe { unsafe {
board::csr::rtio_moninj::inj_chan_sel_write(u8_or_u16(channel)); board::csr::rtio_moninj::inj_chan_sel_write(channel as _);
board::csr::rtio_moninj::inj_override_sel_write(overrd); board::csr::rtio_moninj::inj_override_sel_write(overrd);
board::csr::rtio_moninj::inj_value_write(value); board::csr::rtio_moninj::inj_value_write(value);
} }
@ -63,7 +44,7 @@ fn process_aux_packet(p: &drtioaux::Packet) {
let value; let value;
#[cfg(has_rtio_moninj)] #[cfg(has_rtio_moninj)]
unsafe { unsafe {
board::csr::rtio_moninj::inj_chan_sel_write(u8_or_u16(channel)); board::csr::rtio_moninj::inj_chan_sel_write(channel as _);
board::csr::rtio_moninj::inj_override_sel_write(overrd); board::csr::rtio_moninj::inj_override_sel_write(overrd);
value = board::csr::rtio_moninj::inj_value_read(); value = board::csr::rtio_moninj::inj_value_read();
} }