From 61ca46ec3fe8db0cc1bf1c641264252150fd7d67 Mon Sep 17 00:00:00 2001 From: Garrett Date: Tue, 5 Nov 2019 14:54:20 -0600 Subject: [PATCH] updated adoo10.py for RAM mode frequency control --- artiq/coredevice/ad9910.py | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/artiq/coredevice/ad9910.py b/artiq/coredevice/ad9910.py index 170068dc8..5ffe93110 100644 --- a/artiq/coredevice/ad9910.py +++ b/artiq/coredevice/ad9910.py @@ -345,7 +345,8 @@ class AD9910: @kernel def set_cfr1(self, power_down=0b0000, phase_autoclear=0, drg_load_lrr=0, drg_autoclear=0, - internal_profile=0, ram_destination=0, ram_enable=0): + internal_profile=0, ram_destination=0, ram_enable=0, + manual_osk_external=0, osk_enable=0, select_auto_osk=0): """Set CFR1. See the AD9910 datasheet for parameter meanings. This method does not pulse IO_UPDATE. @@ -363,10 +364,13 @@ class AD9910: self.write32(_AD9910_REG_CFR1, (ram_enable << 31) | (ram_destination << 29) | + (manual_osk_external << 23) | (internal_profile << 17) | (drg_load_lrr << 15) | (drg_autoclear << 14) | (phase_autoclear << 13) | + (osk_enable << 9) | + (select_auto_osk << 8) | (power_down << 4) | 2) # SDIO input only, MSB first @@ -526,7 +530,7 @@ class AD9910: @kernel def set_asf(self, asf): - self.write32(_AD9910_REG_ASF, asf) + self.write32(_AD9910_REG_ASF, asf<<2) @kernel def set_pow(self, pow_):