forked from M-Labs/artiq
manual: update firmware/gateware build/flashing instructions. Closes #1223
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@ -56,7 +56,7 @@ Preparing the build environment for the core device
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---------------------------------------------------
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---------------------------------------------------
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These steps are required to generate code that can run on the core
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These steps are required to generate code that can run on the core
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device. They are necessary both for building the MiSoC BIOS
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device. They are necessary both for building the firmware
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and the ARTIQ kernels.
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and the ARTIQ kernels.
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* Install required host packages: ::
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* Install required host packages: ::
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@ -226,6 +226,10 @@ These steps are required to generate gateware bitstream (``.bit``) files, build
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.. _build-target-binaries:
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.. _build-target-binaries:
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* For Kasli::
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$ python3 -m artiq.gateware.targets.kasli -V <your_variant>
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* For KC705::
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* For KC705::
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$ python3 -m artiq.gateware.targets.kc705 -V nist_clock # or nist_qc2
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$ python3 -m artiq.gateware.targets.kc705 -V nist_clock # or nist_qc2
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@ -234,13 +238,9 @@ These steps are required to generate gateware bitstream (``.bit``) files, build
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.. _flash-target-binaries:
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.. _flash-target-binaries:
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* Then, gather the binaries and flash them: ::
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* Then, flash the binaries: ::
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$ mkdir binaries
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$ artiq_flash --srcbuild artiq_kasli -V <your_variant>
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$ cp misoc_nist_qcX_<board>/gateware/top.bit binaries
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$ cp misoc_nist_qcX_<board>/software/bios/bios.bin binaries
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$ cp misoc_nist_qcX_<board>/software/runtime/runtime.fbi binaries
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$ artiq_flash -d binaries
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* Check that the board boots by running a serial terminal program (you may need to press its FPGA reconfiguration button or power-cycle it to load the gateware bitstream that was newly written into the flash): ::
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* Check that the board boots by running a serial terminal program (you may need to press its FPGA reconfiguration button or power-cycle it to load the gateware bitstream that was newly written into the flash): ::
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