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artiq_flash: flash RTM firmware 

based on whitequark's work in f95fb27

m-labs/artiq#813
This commit is contained in:
Robert Jördens 2018-02-28 16:47:02 +00:00 committed by Robert Jordens
parent 0c49201be7
commit 54984f080b
2 changed files with 44 additions and 27 deletions
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69
artiq/frontend/artiq_flash.py
View File

@ -256,28 +256,29 @@ def main():
config = { config = {
"kc705": { "kc705": {
"programmer": partial(ProgrammerXC7, board="kc705", proxy="bscan_spi_xc7k325t.bit"), "programmer": partial(ProgrammerXC7, board="kc705", proxy="bscan_spi_xc7k325t.bit"),
"variants": ["nist_clock", "nist_qc2"], "variants": ["nist_clock", "nist_qc2"],
"gateware": ("spi0", 0x000000), "gateware": ("spi0", 0x000000),
"bootloader": ("spi0", 0xaf0000), "bootloader": ("spi0", 0xaf0000),
"storage": ("spi0", 0xb30000), "storage": ("spi0", 0xb30000),
"firmware": ("spi0", 0xb40000), "firmware": ("spi0", 0xb40000),
}, },
"kasli": { "kasli": {
"programmer": partial(ProgrammerXC7, board="kasli", proxy="bscan_spi_xc7a100t.bit"), "programmer": partial(ProgrammerXC7, board="kasli", proxy="bscan_spi_xc7a100t.bit"),
"variants": ["opticlock", "master", "satellite"], "variants": ["opticlock", "master", "satellite"],
"gateware": ("spi0", 0x000000), "gateware": ("spi0", 0x000000),
"bootloader": ("spi0", 0x400000), "bootloader": ("spi0", 0x400000),
"storage": ("spi0", 0x440000), "storage": ("spi0", 0x440000),
"firmware": ("spi0", 0x450000), "firmware": ("spi0", 0x450000),
}, },
"sayma": { "sayma": {
"programmer": ProgrammerSayma, "programmer": ProgrammerSayma,
"variants": ["standalone", "master", "satellite"], "variants": ["standalone", "master", "satellite"],
"gateware": ("spi0", 0x000000), "gateware": ("spi0", 0x000000),
"bootloader": ("spi1", 0x000000), "bootloader": ("spi1", 0x000000),
"storage": ("spi1", 0x040000), "storage": ("spi1", 0x040000),
"firmware": ("spi1", 0x050000), "firmware": ("spi1", 0x050000),
"rtm_gateware": ("spi1", 0x150000),
}, },
}[args.target] }[args.target]
@ -309,18 +310,34 @@ def main():
else: else:
return os.path.join(args.srcbuild, *path_filename) return os.path.join(args.srcbuild, *path_filename)
def convert_gateware(bit_filename, header=False):
bin_handle, bin_filename = tempfile.mkstemp(
prefix="artiq_", suffix="_" + os.path.basename(bit_filename))
with open(bit_filename, "rb") as bit_file, \
open(bin_handle, "wb") as bin_file:
if header:
bin_file.write(b"\x00"*8)
bit2bin(bit_file, bin_file)
if header:
magic = 0x53415231 # "SAR1"
length = bin_file.tell() - 8
bin_file.seek(0)
bin_file.write(magic.to_bytes(4, byteorder="big"))
bin_file.write(length.to_bytes(4, byteorder="big"))
atexit.register(lambda: os.unlink(bin_filename))
return bin_filename
try: try:
for action in args.action: for action in args.action:
if action == "gateware": if action == "gateware":
gateware_bin = artifact_path(variant, "gateware", "top.bin") gateware_bin = convert_gateware(
if not os.access(gateware_bin, os.R_OK): artifact_path(variant, "gateware", "top.bit"))
bin_handle, gateware_bin = tempfile.mkstemp()
gateware_bit = artifact_path(variant, "gateware", "top.bit")
with open(gateware_bit, "rb") as bit_file, open(bin_handle, "wb") as bin_file:
bit2bin(bit_file, bin_file)
atexit.register(lambda: os.unlink(gateware_bin))
programmer.write_binary(*config["gateware"], gateware_bin) programmer.write_binary(*config["gateware"], gateware_bin)
if args.target == "sayma":
rtm_gateware_bin = convert_gateware(
artifact_path("rtm_gateware", "rtm.bit"), header=True)
programmer.write_binary(*config["rtm_gateware"],
rtm_gateware_bin)
elif action == "bootloader": elif action == "bootloader":
bootloader_bin = artifact_path(variant, "software", "bootloader", "bootloader.bin") bootloader_bin = artifact_path(variant, "software", "bootloader", "bootloader.bin")
programmer.write_binary(*config["bootloader"], bootloader_bin) programmer.write_binary(*config["bootloader"], bootloader_bin)

2
artiq/gateware/targets/sayma_amc.py
View File

@ -171,7 +171,7 @@ class Standalone(MiniSoC, AMPSoC):
]) ])
self.csr_devices.append("slave_fpga_cfg") self.csr_devices.append("slave_fpga_cfg")
self.config["HAS_SLAVE_FPGA"] = None self.config["HAS_SLAVE_FPGA"] = None
self.config["SLAVE_FPGA_GATEWARE"] = 0xde0000 self.config["SLAVE_FPGA_GATEWARE"] = 0x150000
# AMC/RTM serwb # AMC/RTM serwb
serwb_pll = serwb.phy.SERWBPLL(125e6, 625e6, vco_div=2) serwb_pll = serwb.phy.SERWBPLL(125e6, 625e6, vco_div=2)