From 53be34a25f848a45e78152d14205290d19bfd7ef Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Thu, 22 Jun 2017 13:27:49 +0200 Subject: [PATCH] sawg: clear phase accu in reset --- artiq/coredevice/sawg.py | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/artiq/coredevice/sawg.py b/artiq/coredevice/sawg.py index 5f81bf146..4ea97e23f 100644 --- a/artiq/coredevice/sawg.py +++ b/artiq/coredevice/sawg.py @@ -311,17 +311,10 @@ class SAWG: settings. This method advances the timeline by the time required to perform all - six writes to the configuration channel. + seven writes to the configuration channel. """ - self.frequency0.set_mu(0) - self.frequency1.set_mu(0) - self.frequency2.set_mu(0) - self.phase0.set_mu(0) - self.phase1.set_mu(0) - self.phase2.set_mu(0) - self.amplitude1.set_mu(0) - self.amplitude2.set_mu(0) - self.offset.set_mu(0) + self.config.set_div(0, 0) + delay_mu(self.config._rtio_interval) self.config.set_clr(1, 1, 1) delay_mu(self.config._rtio_interval) self.config.set_iq_en(1, 0) @@ -334,3 +327,12 @@ class SAWG: delay_mu(self.config._rtio_interval) self.config.set_out_max(1.) delay_mu(self.config._rtio_interval) + self.frequency0.set_mu(0) + self.frequency1.set_mu(0) + self.frequency2.set_mu(0) + self.phase0.set_mu(0) + self.phase1.set_mu(0) + self.phase2.set_mu(0) + self.amplitude1.set_mu(0) + self.amplitude2.set_mu(0) + self.offset.set_mu(0)