forked from M-Labs/artiq
devices/rtio_core: rename RTIOCounter to RTIOIn and document
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@ -26,54 +26,108 @@ class _RTIOBase(AutoContext):
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class RTIOOut(_RTIOBase):
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class RTIOOut(_RTIOBase):
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"""RTIO output driver.
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This driver configures the corresponding RTIO channel as output on the core
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device and provides functions to set its level.
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This driver supports zero-length transition suppression. For example, if
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two pulses are emitted back-to-back with no delay between them, they will
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be merged into a single pulse with a duration equal to the sum of the
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durations of the original pulses.
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:param core: core device
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:param channel: channel number
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"""
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def build(self):
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def build(self):
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_RTIOBase.build(self)
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_RTIOBase.build(self)
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self._set_oe(1)
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self._set_oe(1)
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@kernel
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@kernel
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def sync(self):
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def sync(self):
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"""Busy-waits until all programmed level switches have been effected.
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This function is useful to synchronize CPU-controlled devices (such as
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the AD9858 DDS bus) with related RTIO controls (such as RF switches at
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the output of the DDS).
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"""
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syscall("rtio_sync", self.channel)
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syscall("rtio_sync", self.channel)
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@kernel
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@kernel
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def on(self):
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def on(self):
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"""Sets the output to a logic high state.
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"""
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self._set_value(1)
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self._set_value(1)
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@kernel
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@kernel
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def off(self):
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def off(self):
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"""Sets the output to a logic low state.
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"""
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self._set_value(0)
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self._set_value(0)
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@kernel
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@kernel
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def pulse(self, duration):
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def pulse(self, duration):
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"""Pulses the output high for the specified duration.
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"""
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self.on()
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self.on()
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delay(duration)
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delay(duration)
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self.off()
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self.off()
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class RTIOCounter(_RTIOBase):
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class RTIOIn(_RTIOBase):
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"""RTIO input driver.
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This driver configures the corresponding RTIO channel as input on the core
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device and provides functions to analyze the incoming signal, with
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real-time gating to prevent overflows.
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:param core: core device
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:param channel: channel number
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"""
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def build(self):
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def build(self):
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_RTIOBase.build(self)
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_RTIOBase.build(self)
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self._set_oe(0)
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self._set_oe(0)
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@kernel
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@kernel
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def count_rising(self, duration):
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def gate_rising(self, duration):
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"""Register rising edge events for the specified duration.
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"""
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self._set_value(1)
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self._set_value(1)
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delay(duration)
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delay(duration)
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self._set_value(0)
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self._set_value(0)
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@kernel
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@kernel
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def count_falling(self, duration):
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def gate_falling(self, duration):
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"""Register falling edge events for the specified duration.
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"""
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self._set_value(2)
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self._set_value(2)
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delay(duration)
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delay(duration)
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self._set_value(0)
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self._set_value(0)
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@kernel
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@kernel
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def count_both_edges(self, duration):
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def gate_both(self, duration):
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"""Register both rising and falling edge events for the specified
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duration.
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"""
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self._set_value(3)
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self._set_value(3)
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delay(duration)
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delay(duration)
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self._set_value(0)
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self._set_value(0)
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@kernel
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@kernel
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def sync(self):
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def count(self):
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"""Poll the RTIO input during all the previously programmed gate
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openings, and returns the number of registered events.
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"""
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count = 0
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count = 0
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while syscall("rtio_get", self.channel) >= 0:
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while syscall("rtio_get", self.channel) >= 0:
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count += 1
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count += 1
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8
doc/manual/drivers_reference.rst
Normal file
8
doc/manual/drivers_reference.rst
Normal file
@ -0,0 +1,8 @@
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Drivers reference
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=================
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:mod:`artiq.devices.rtio_core` module
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-------------------------------------
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.. automodule:: artiq.devices.rtio_core
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:members:
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@ -9,3 +9,4 @@ Contents:
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installing
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installing
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tutorial
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tutorial
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core_reference
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core_reference
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drivers_reference
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@ -16,10 +16,10 @@ class PhotonHistogram(AutoContext):
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self.bd.pulse(210*MHz, 100*us)
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self.bd.pulse(210*MHz, 100*us)
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with parallel:
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with parallel:
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self.bd.pulse(220*MHz, 100*us)
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self.bd.pulse(220*MHz, 100*us)
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self.pmt.count_rising(100*us)
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self.pmt.gate_rising(100*us)
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self.bd.on(200*MHz)
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self.bd.on(200*MHz)
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self.bdd.on(300*MHz)
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self.bdd.on(300*MHz)
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return self.pmt.sync()
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return self.pmt.count()
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@kernel
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@kernel
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def run(self):
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def run(self):
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@ -44,7 +44,7 @@ if __name__ == "__main__":
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reg_channel=0, rtio_channel=1),
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reg_channel=0, rtio_channel=1),
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bdd=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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bdd=dds_core.DDS(core=coredev, dds_sysclk=1*GHz,
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reg_channel=1, rtio_channel=2),
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reg_channel=1, rtio_channel=2),
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pmt=rtio_core.RTIOCounter(core=coredev, channel=0),
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pmt=rtio_core.RTIOIn(core=coredev, channel=0),
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repeats=100,
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repeats=100,
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nbins=100
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nbins=100
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)
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)
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@ -150,8 +150,8 @@ class _RTIOLoopback(AutoContext):
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for i in range(self.npulses):
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for i in range(self.npulses):
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delay(25*ns)
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delay(25*ns)
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self.o.pulse(25*ns)
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self.o.pulse(25*ns)
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self.i.count_rising(10*us)
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self.i.gate_rising(10*us)
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self.report(self.i.sync())
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self.report(self.i.count())
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class _RTIOUnderflow(AutoContext):
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class _RTIOUnderflow(AutoContext):
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@ -171,7 +171,7 @@ class RTIOCase(unittest.TestCase):
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coredev = core.Core(com)
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coredev = core.Core(com)
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uut = _RTIOLoopback(
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uut = _RTIOLoopback(
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core=coredev,
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core=coredev,
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i=rtio_core.RTIOCounter(core=coredev, channel=0),
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i=rtio_core.RTIOIn(core=coredev, channel=0),
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o=rtio_core.RTIOOut(core=coredev, channel=1),
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o=rtio_core.RTIOOut(core=coredev, channel=1),
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npulses=npulses
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npulses=npulses
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)
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)
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