forked from M-Labs/artiq
rtio: remove legacy i_overflow_reset CSR
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5f36e49f91
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504f72a02c
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@ -112,7 +112,6 @@ mod imp {
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}
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}
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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csr::rtio::i_overflow_reset_write(1);
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raise!("RTIOOverflow",
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raise!("RTIOOverflow",
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"RTIO input overflow on channel {0}",
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"RTIO input overflow on channel {0}",
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channel as i64, 0, 0);
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channel as i64, 0, 0);
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@ -141,7 +140,6 @@ mod imp {
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}
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}
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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csr::rtio::i_overflow_reset_write(1);
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raise!("RTIOOverflow",
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raise!("RTIOOverflow",
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"RTIO input overflow on channel {0}",
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"RTIO input overflow on channel {0}",
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channel as i64, 0, 0);
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channel as i64, 0, 0);
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@ -167,7 +165,6 @@ mod imp {
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}
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}
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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if status & RTIO_I_STATUS_OVERFLOW != 0 {
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csr::rtio::i_overflow_reset_write(1);
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raise!("RTIOOverflow",
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raise!("RTIOOverflow",
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"RTIO input overflow on channel {0}",
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"RTIO input overflow on channel {0}",
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channel as i64, 0, 0);
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channel as i64, 0, 0);
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@ -79,7 +79,6 @@ class KernelInitiator(Module, AutoCSR):
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self.i_data = CSRStatus(32)
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self.i_data = CSRStatus(32)
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self.i_timestamp = CSRStatus(64)
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self.i_timestamp = CSRStatus(64)
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self.i_status = CSRStatus(4)
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self.i_status = CSRStatus(4)
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self.i_overflow_reset = CSR()
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self.counter = CSRStatus(64)
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self.counter = CSRStatus(64)
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self.counter_update = CSR()
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self.counter_update = CSR()
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