forked from M-Labs/artiq
ttl_serdes_7series: suppress diff_term in outputs
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parent
e356150ac4
commit
50298a6104
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@ -26,10 +26,15 @@ class _OSERDESE2_8X(Module):
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if pad_n is None:
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if pad_n is None:
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self.comb += pad.eq(pad_o)
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self.comb += pad.eq(pad_o)
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else:
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else:
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self.specials += Instance("OBUFDS",
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self.specials += Instance("IOBUFDS_INTERMDISABLE",
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p_DIFF_TERM="FALSE",
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p_IBUF_LOW_PWR="TRUE",
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p_USE_IBUFDISABLE="TRUE",
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i_IBUFDISABLE=1,
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i_INTERMDISABLE=1,
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i_I=pad_o,
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i_I=pad_o,
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o_O=pad, o_OB=pad_n)
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i_T=self.t_out,
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io_IO=pad, io_IOB=pad_n)
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class _ISERDESE2_8X(Module):
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class _ISERDESE2_8X(Module):
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def __init__(self, pad, pad_n=None):
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def __init__(self, pad, pad_n=None):
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@ -54,7 +59,14 @@ class _ISERDESE2_8X(Module):
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if pad_n is None:
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if pad_n is None:
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self.comb += pad_i.eq(pad)
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self.comb += pad_i.eq(pad)
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else:
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else:
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self.specials += Instance("IBUFDS", o_O=pad_i, i_I=pad, i_IB=pad_n)
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self.specials += Instance("IBUFDS_INTERMDISABLE",
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p_DIFF_TERM="TRUE",
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p_IBUF_LOW_PWR="TRUE",
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p_USE_IBUFDISABLE="TRUE",
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i_IBUFDISABLE=0,
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i_INTERMDISABLE=0,
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o_O=pad_i,
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io_IO=pad, io_IOB=pad_n)
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class _IOSERDESE2_8X(Module):
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class _IOSERDESE2_8X(Module):
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