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manual: update core device section on Kasli

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Sebastien Bourdeauducq 2019-05-07 20:19:13 +08:00
parent 4fab405b36
commit 4e230bb768
1 changed files with 30 additions and 38 deletions
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doc/manual/core_device.rst
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@ -26,10 +26,39 @@ FPGA board ports
All boards have a serial interface running at 115200bps 8-N-1 that can be used for debugging.
Kasli
-----
`Kasli <https://github.com/m-labs/sinara/wiki/Kasli>`_ is a versatile core device designed for ARTIQ as part of the `Sinara <https://github.com/m-labs/sinara/wiki>`_ family of boards. All variants support interfacing to various EEM daughterboards (TTL, DDS, ADC, DAC...) connected directly to it.
Standalone variants
+++++++++++++++++++
Kasli is connected to the network using a 1000Base-X SFP module. `No-name <fs.com>`_ BiDi (1000Base-BX) modules have been used successfully. The SFP module for the network should be installed into the SFP0 cage.
The other SFP cages are not used.
The RTIO clock frequency is 125MHz or 150MHz, which is generated by the Si5324.
DRTIO master variants
+++++++++++++++++++++
Kasli can be used as a DRTIO master that provides local RTIO channels and can additionally control one DRTIO satellite.
The RTIO clock frequency is 125MHz or 150MHz, which is generated by the Si5324. The DRTIO line rate is 2.5Gbps or 3Gbps.
As with the standalone configuration, the SFP module for the Ethernet network should be installed into the SFP0 cage. The DRTIO connections are on SFP1 and SFP2, and optionally on the SATA connector.
DRTIO satellite/repeater variants
+++++++++++++++++++++++++++++++++
Kasli can be used as a DRTIO satellite with a 125MHz or 150MHz RTIO clock and a 2.5Gbps or 3Gbps DRTIO line rate.
The DRTIO upstream connection is on SFP0 or optionally on the SATA connector, and the remaining SFPs are downstream ports.
KC705
-----
The main target board for the ARTIQ core device is the KC705 development board from Xilinx. It supports the NIST CLOCK and QC2 hardware (FMC).
An alternative target board for the ARTIQ core device is the KC705 development board from Xilinx. It supports the NIST CLOCK and QC2 hardware (FMC).
Common problems
+++++++++++++++
@ -137,40 +166,3 @@ Clocking
The KC705 supports an internal 125MHz RTIO clock (based on its crystal oscillator) and an external clock, that can be selected using the ``rtio_clock`` configuration entry.
Kasli
-----
`Kasli <https://github.com/m-labs/sinara/wiki/Kasli>`_ is a versatile core device designed for ARTIQ as part of the `Sinara <https://github.com/m-labs/sinara/wiki>`_ family of boards.
Opticlock
+++++++++
In the opticlock variant, Kasli is the core device controlling three `DIO_BNC <https://github.com/m-labs/sinara/wiki/DIO_BNC>`_ boards, one `Urukul-AD9912 <https://github.com/m-labs/sinara/wiki/Urukul>`_, one `Urukul-AD9910 <https://github.com/m-labs/sinara/wiki/Urukul>`_, and one Sampler `<https://github.com/m-labs/sinara/wiki/Sampler>`_.
Kasli is connected to the network using a 1000Base-X SFP module. `No-name
<fs.com>`_ BiDi (1000Base-BX) modules have been used successfully. The SFP module for the network
should be installed into the SFP0 cage.
Kasli is supplied with 100 MHz reference at its SMA input.
Both Urukul boards are supplied with a 100 MHz reference clock on their external
SMA inputs.
The RTIO clock frequency is 125 MHz, which is synthesized from the 100 MHz reference using the Si5324.
The first four TTL channels are used as inputs. The rest are outputs.
DRTIO master
++++++++++++
Kasli can be used as a DRTIO master that provides local RTIO channels and can additionally control one DRTIO satellite.
The RTIO clock frequency is 150 MHz, which is synthesized from the Si5324 crystal. The DRTIO line rate is 3 Gbps.
The SFP module for the Ethernet network should be installed into the SFP0 cage, and the DRTIO connection is on SFP2.
DRTIO satellite
+++++++++++++++
Kasli can be used as a DRTIO satellite with a 150 MHz RTIO clock and a 3 Gbps DRTIO line rate.
The DRTIO connection is on SFP0.