forked from M-Labs/artiq
Make negative and too-far shifts have defined behavior.
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bf60978c7b
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@ -900,8 +900,14 @@ class ARTIQIRGenerator(algorithm.Visitor):
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def visit_BinOpT(self, node):
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if builtins.is_numeric(node.type):
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# TODO: check for division by zero
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# TODO: check for shift by too many bits
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return self.append(ir.Arith(node.op, self.visit(node.left), self.visit(node.right)))
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rhs = self.visit(node.right)
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if isinstance(node.op, (ast.LShift, ast.RShift)):
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# Check for negative shift amount.
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self._make_check(self.append(ir.Compare(ast.GtE(loc=None), rhs,
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ir.Constant(0, rhs.type))),
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lambda: self.append(ir.Alloc([], builtins.TValueError())))
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return self.append(ir.Arith(node.op, self.visit(node.left), rhs))
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elif isinstance(node.op, ast.Add): # list + list, tuple + tuple
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lhs, rhs = self.visit(node.left), self.visit(node.right)
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if types.is_tuple(node.left.type) and types.is_tuple(node.right.type):
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@ -368,11 +368,21 @@ class LLVMIRGenerator:
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return self.llbuilder.fptosi(llvalue, self.llty_of_type(insn.type),
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name=insn.name)
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elif isinstance(insn.op, ast.LShift):
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return self.llbuilder.shl(self.map(insn.lhs()), self.map(insn.rhs()),
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name=insn.name)
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lllhs, llrhs = map(self.map, (insn.lhs(), insn.rhs()))
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llrhs_max = ll.Constant(llrhs.type, builtins.get_int_width(insn.lhs().type))
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llrhs_overflow = self.llbuilder.icmp_signed('>=', llrhs, llrhs_max)
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llvalue_zero = ll.Constant(lllhs.type, 0)
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llvalue = self.llbuilder.shl(lllhs, llrhs)
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return self.llbuilder.select(llrhs_overflow, llvalue_zero, llvalue,
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name=insn.name)
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elif isinstance(insn.op, ast.RShift):
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return self.llbuilder.ashr(self.map(insn.lhs()), self.map(insn.rhs()),
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name=insn.name)
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lllhs, llrhs = map(self.map, (insn.lhs(), insn.rhs()))
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llrhs_max = ll.Constant(llrhs.type, builtins.get_int_width(insn.lhs().type) - 1)
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llrhs_overflow = self.llbuilder.icmp_signed('>', llrhs, llrhs_max)
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llvalue = self.llbuilder.ashr(lllhs, llrhs)
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llvalue_max = self.llbuilder.ashr(lllhs, llrhs_max) # preserve sign bit
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return self.llbuilder.select(llrhs_overflow, llvalue_max, llvalue,
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name=insn.name)
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elif isinstance(insn.op, ast.BitAnd):
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return self.llbuilder.and_(self.map(insn.lhs()), self.map(insn.rhs()),
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name=insn.name)
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@ -28,6 +28,8 @@ assert 9.0 ** 0.5 == 3.0
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assert 1 << 1 == 2
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assert 2 >> 1 == 1
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assert -2 >> 1 == -1
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assert 1 << 32 == 0
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assert -1 >> 32 == -1
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assert 0x18 & 0x0f == 0x08
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assert 0x18 | 0x0f == 0x1f
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assert 0x18 ^ 0x0f == 0x17
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