forked from M-Labs/artiq
1
0
Fork 0

doc: update flterm instructions. Closes #346

This commit is contained in:
Sebastien Bourdeauducq 2016-03-25 20:10:53 +08:00
parent 8b00045c20
commit 4c622194c2
1 changed files with 3 additions and 2 deletions

View File

@ -283,8 +283,7 @@ These steps are required to generate gateware bitstream (``.bit``) files, build
* Check that the board boots by running a serial terminal program (you may need to press its FPGA reconfiguration button or power-cycle it to load the gateware bitstream that was newly written into the flash): ::
$ make -C ~/artiq-dev/misoc/tools # do only once
$ ~/artiq-dev/misoc/tools/flterm --port /dev/ttyUSB1
$ flterm /dev/ttyUSB1
MiSoC BIOS http://m-labs.hk
[...]
Booting from flash...
@ -292,6 +291,8 @@ These steps are required to generate gateware bitstream (``.bit``) files, build
Executing booted program.
ARTIQ runtime built <date/time>
.. note:: flterm is part of MiSoC. If you installed MiSoC with ``setup.py develop --user``, the flterm launcher is in ``~/.local/bin``.
The communication parameters are 115200 8-N-1. Ensure that your user has access
to the serial device (``sudo adduser $USER dialout`` assuming standard setup).