From 4b5c10b6415c2b0fa4b8fe8ad5fea542aa3ebf9b Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sun, 20 Dec 2015 22:05:52 +0800 Subject: [PATCH] coredevice/core: remove default period --- artiq/coredevice/core.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/artiq/coredevice/core.py b/artiq/coredevice/core.py index b9f6e11c9..35e23225a 100644 --- a/artiq/coredevice/core.py +++ b/artiq/coredevice/core.py @@ -47,7 +47,7 @@ class Core: external RTIO clock input instead of using its internal oscillator. :param comm_device: name of the device used for communications. """ - def __init__(self, dmgr, ref_period=8*ns, external_clock=False, comm_device="comm"): + def __init__(self, dmgr, ref_period, external_clock=False, comm_device="comm"): self.ref_period = ref_period self.external_clock = external_clock self.comm = dmgr.get(comm_device)