forked from M-Labs/artiq
manual: split source install instructions to a separate page
This commit is contained in:
parent
21574bdfa9
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@ -8,6 +8,7 @@ Contents:
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introduction
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installing
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installing_from_source
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release_notes
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getting_started_core
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compiler
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@ -1,9 +1,10 @@
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.. _install-from-conda:
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Installing ARTIQ
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================
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The preferred way of installing ARTIQ is through the use of the conda package manager.
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The conda package contains pre-built binaries that you can directly flash to your board.
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But you can also :ref:`install from sources <install-from-sources>`.
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.. warning::
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NIST users on Linux need to pay close attention to their ``umask``.
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@ -11,16 +12,13 @@ But you can also :ref:`install from sources <install-from-sources>`.
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The usual umask is 022.
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Installing using conda
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----------------------
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.. warning::
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Conda packages are supported for Linux (64-bit) and Windows (32- and 64-bit).
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Users of other operating systems (32-bit Linux, BSD, OSX ...) should and can :ref:`install from source <install-from-sources>`.
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Installing Anaconda or Miniconda
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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--------------------------------
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You can either install Anaconda (choose Python 3.5) from https://store.continuum.io/cshop/anaconda/ or install the more minimalistic Miniconda (choose Python 3.5) from http://conda.pydata.org/miniconda.html
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@ -31,7 +29,7 @@ After installing either Anaconda or Miniconda, open a new terminal (also known a
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Executing just ``conda`` should print the help of the ``conda`` command [1]_.
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Installing the ARTIQ packages
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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-----------------------------
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Add the M-Labs ``main`` Anaconda package repository containing stable releases and release candidates to your conda configuration::
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@ -76,7 +74,7 @@ This activation has to be performed in every new shell you open to make the ARTI
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Upgrading ARTIQ
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^^^^^^^^^^^^^^^
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---------------
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When upgrading ARTIQ or when testing different versions it is recommended that new environments are created instead of upgrading the packages in existing environments.
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Keep previous environments around until you are certain that they are not needed anymore and a new environment is known to work correctly.
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@ -92,7 +90,7 @@ You can list the environments you have created using::
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See also the `conda documentation <http://conda.pydata.org/docs/using/envs.html>`_ for managing environments.
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Preparing the core device FPGA board
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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------------------------------------
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You now need to write three binary images onto the FPGA board:
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@ -105,7 +103,7 @@ They are all shipped in the conda packages, along with the required flash proxy
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.. _install-openocd:
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Installing OpenOCD
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..................
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^^^^^^^^^^^^^^^^^^
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OpenOCD can be used to write the binary images into the core device FPGA board's flash memory. It can be installed using conda on both Linux and Windows::
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@ -144,211 +142,6 @@ Then, you can flash the board:
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For the KC705, the next step is to flash the MAC and IP addresses to the board. See :ref:`those instructions <flash-mac-ip-addr>`.
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.. _install-from-sources:
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Installing from source
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----------------------
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Preparing the build environment for the core device
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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These steps are required to generate code that can run on the core
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device. They are necessary both for building the MiSoC BIOS
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and the ARTIQ kernels.
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* Create a development directory: ::
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$ mkdir ~/artiq-dev
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* Clone ARTIQ repository: ::
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$ cd ~/artiq-dev
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$ git clone --recursive https://github.com/m-labs/artiq
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* Install OpenRISC binutils (or1k-linux-...): ::
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$ cd ~/artiq-dev
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$ wget https://ftp.gnu.org/gnu/binutils/binutils-2.26.tar.bz2
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$ tar xvf binutils-2.26.tar.bz2
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$ rm binutils-2.26.tar.bz2
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$ mkdir build
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$ cd build
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$ ../configure --target=or1k-linux --prefix=/usr/local
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$ make -j4
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$ sudo make install
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.. note::
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We're using an ``or1k-linux`` target because it is necessary to enable
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shared library support in ``ld``, not because Linux is involved.
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* Install LLVM and Clang: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/openrisc/llvm-or1k
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$ cd llvm-or1k/tools
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$ git clone https://github.com/openrisc/clang-or1k clang
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$ cd ..
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$ mkdir build
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$ cd build
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$ cmake .. -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-or1k -DLLVM_TARGETS_TO_BUILD="OR1K;X86" -DLLVM_ENABLE_ASSERTIONS=ON
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$ make -j4
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$ sudo make install
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.. note::
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Compilation of LLVM can take more than 30 min on some machines.
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Preparing the core device FPGA board
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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These steps are required to generate gateware bitstream (``.bit``) files, build the MiSoC BIOS and ARTIQ runtime, and flash FPGA boards. If the board is already flashed, you may skip those steps and go directly to `Installing the host-side software`.
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* Install the FPGA vendor tools (i.e. Xilinx ISE and/or Vivado):
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* Get Xilinx tools from http://www.xilinx.com/support/download/index.htm. ISE can build gateware bitstreams both for boards using the Spartan-6 (Pipistrello) and 7-series devices (KC705), while Vivado supports only boards using 7-series devices.
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* The Pipistrello is supported by Webpack, the KC705 is not.
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* During the Xilinx toolchain installation, uncheck ``Install cable drivers`` (they are not required as we use better and open source alternatives).
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* Install Migen: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/m-labs/migen
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$ cd migen
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$ python3.5 setup.py develop --user
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.. note::
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The options ``develop`` and ``--user`` are for setup.py to install Migen in ``~/.local/lib/python3.5``.
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.. _install-flash-proxy:
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* Install the required flash proxy gateware bitstreams:
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The purpose of the flash proxy gateware bitstream is to give programming software fast JTAG access to the flash connected to the FPGA.
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* Pipistrello and KC705:
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::
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$ cd ~/artiq-dev
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$ wget https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/master/bscan_spi_xc7k325t.bit
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$ wget https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/master/bscan_spi_xc6slx45.bit
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Then move both files ``~/artiq-dev/bscan_spi_xc6slx45.bit`` and ``~/artiq-dev/bscan_spi_xc7k325t.bit`` to ``~/.migen``, ``/usr/local/share/migen``, or ``/usr/share/migen``.
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* :ref:`Download and install OpenOCD <install-openocd>`.
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* Download and install MiSoC: ::
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$ cd ~/artiq-dev
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$ git clone --recursive https://github.com/m-labs/misoc
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$ cd misoc
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$ python3.5 setup.py develop --user
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* Download and install ARTIQ: ::
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$ cd ~/artiq-dev
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$ git clone --recursive https://github.com/m-labs/artiq
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$ cd artiq
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$ python3.5 setup.py develop --user
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.. note::
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If you have any trouble during ARTIQ setup about ``pygit2`` installation,
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refer to the section dealing with
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:ref:`installing the host-side software <installing-the-host-side-software>`.
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* Build the gateware bitstream, BIOS and runtime by running:
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::
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$ cd ~/artiq-dev
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$ export PATH=/usr/local/llvm-or1k/bin:$PATH
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.. note:: Make sure that ``/usr/local/llvm-or1k/bin`` is first in your ``PATH``, so that the ``clang`` command you just built is found instead of the system one, if any.
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* For Pipistrello::
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$ python3.5 -m artiq.gateware.targets.pipistrello
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* For KC705::
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$ python3.5 -m artiq.gateware.targets.kc705 -H nist_qc1 # or nist_qc2
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.. note:: Add ``--toolchain vivado`` if you wish to use Vivado instead of ISE.
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* Then, gather the binaries and flash them: ::
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$ mkdir binaries
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$ cp misoc_nist_qcX_<board>/gateware/top.bit binaries
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$ cp misoc_nist_qcX_<board>/software/bios/bios.bin binaries
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$ cp misoc_nist_qcX_<board>/software/runtime/runtime.fbi binaries
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$ cd binaries
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$ artiq_flash -d . -t <board>
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.. note:: The `-t` option specifies the board your are targeting. Available options are ``kc705`` and ``pipistrello``.
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* Check that the board boots by running a serial terminal program (you may need to press its FPGA reconfiguration button or power-cycle it to load the gateware bitstream that was newly written into the flash): ::
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$ flterm /dev/ttyUSB1
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MiSoC BIOS http://m-labs.hk
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[...]
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Booting from flash...
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Loading xxxxx bytes from flash...
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Executing booted program.
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ARTIQ runtime built <date/time>
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.. note:: flterm is part of MiSoC. If you installed MiSoC with ``setup.py develop --user``, the flterm launcher is in ``~/.local/bin``.
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The communication parameters are 115200 8-N-1. Ensure that your user has access
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to the serial device (``sudo adduser $USER dialout`` assuming standard setup).
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.. _installing-the-host-side-software:
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Installing the host-side software
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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* Install the llvmlite Python bindings: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/m-labs/llvmlite
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$ cd llvmlite
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$ git checkout artiq
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$ LLVM_CONFIG=/usr/local/llvm-or1k/bin/llvm-config python3.5 setup.py install --user
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* Install ARTIQ: ::
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$ cd ~/artiq-dev
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$ git clone --recursive https://github.com/m-labs/artiq # if not already done
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$ cd artiq
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$ python3.5 setup.py develop --user
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.. note::
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If you have any trouble during ARTIQ setup about ``pygit2`` installation,
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you can install it by using ``pip``:
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On Ubuntu 14.04::
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$ python3.5 `which pip3` install --user pygit2==0.19.1
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On Ubuntu 14.10::
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$ python3.5 `which pip3` install --user pygit2==0.20.3
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On Ubuntu 15.04 and 15.10::
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$ python3.5 `which pip3` install --user pygit2==0.22.1
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The rationale behind this is that pygit2 and libgit2 must have the same
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major.minor version numbers.
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See http://www.pygit2.org/install.html#version-numbers
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* Build the documentation: ::
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$ cd ~/artiq-dev/artiq/doc/manual
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$ make html
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Configuring the core device
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---------------------------
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@ -359,12 +152,12 @@ This should be done after either installation method (conda or source).
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* Set the MAC and IP address in the :ref:`core device configuration flash storage <core-device-flash-storage>`:
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* You can either set it by generating a flash storage image and then flash it: ::
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* You can set it through JTAG by generating a flash storage image and then flashing it: ::
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$ artiq_mkfs flash_storage.img -s mac xx:xx:xx:xx:xx:xx -s ip xx.xx.xx.xx
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$ artiq_flash -f flash_storage.img proxy storage start
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* Or you can set it via the runtime test mode command line
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* Or, if you have a serial connection ready, you can set it via the runtime test mode command line
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* Boot the board.
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@ -0,0 +1,208 @@
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.. _install-from-sources:
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Installing ARTIQ from sources
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=============================
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.. note::
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This method is only recommended for developers and advanced users. An easier way to install ARTIQ is via the Anaconda packages (see :ref:`Installing ARTIQ <install-from-conda>`).
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Preparing the build environment for the core device
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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These steps are required to generate code that can run on the core
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device. They are necessary both for building the MiSoC BIOS
|
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and the ARTIQ kernels.
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* Create a development directory: ::
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$ mkdir ~/artiq-dev
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* Clone ARTIQ repository: ::
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$ cd ~/artiq-dev
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$ git clone --recursive https://github.com/m-labs/artiq
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* Install OpenRISC binutils (or1k-linux-...): ::
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$ cd ~/artiq-dev
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$ wget https://ftp.gnu.org/gnu/binutils/binutils-2.26.tar.bz2
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$ tar xvf binutils-2.26.tar.bz2
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$ rm binutils-2.26.tar.bz2
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$ mkdir build
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$ cd build
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$ ../configure --target=or1k-linux --prefix=/usr/local
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$ make -j4
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$ sudo make install
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.. note::
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We're using an ``or1k-linux`` target because it is necessary to enable
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shared library support in ``ld``, not because Linux is involved.
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* Install LLVM and Clang: ::
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$ cd ~/artiq-dev
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$ git clone https://github.com/openrisc/llvm-or1k
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$ cd llvm-or1k/tools
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$ git clone https://github.com/openrisc/clang-or1k clang
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$ cd ..
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$ mkdir build
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$ cd build
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$ cmake .. -DCMAKE_BUILD_TYPE=Release -DCMAKE_INSTALL_PREFIX=/usr/local/llvm-or1k -DLLVM_TARGETS_TO_BUILD="OR1K;X86" -DLLVM_ENABLE_ASSERTIONS=ON
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$ make -j4
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$ sudo make install
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.. note::
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Compilation of LLVM can take more than 30 min on some machines.
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Preparing the core device FPGA board
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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These steps are required to generate gateware bitstream (``.bit``) files, build the MiSoC BIOS and ARTIQ runtime, and flash FPGA boards. If the board is already flashed, you may skip those steps and go directly to `Installing the host-side software`.
|
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|
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* Install the FPGA vendor tools (i.e. Xilinx ISE and/or Vivado):
|
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|
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* Get Xilinx tools from http://www.xilinx.com/support/download/index.htm. ISE can build gateware bitstreams both for boards using the Spartan-6 (Pipistrello) and 7-series devices (KC705), while Vivado supports only boards using 7-series devices.
|
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|
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* The Pipistrello is supported by Webpack, the KC705 is not.
|
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|
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* During the Xilinx toolchain installation, uncheck ``Install cable drivers`` (they are not required as we use better and open source alternatives).
|
||||
|
||||
* Install Migen: ::
|
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|
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$ cd ~/artiq-dev
|
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$ git clone https://github.com/m-labs/migen
|
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$ cd migen
|
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$ python3.5 setup.py develop --user
|
||||
|
||||
.. note::
|
||||
The options ``develop`` and ``--user`` are for setup.py to install Migen in ``~/.local/lib/python3.5``.
|
||||
|
||||
* Install the required flash proxy gateware bitstreams:
|
||||
|
||||
The purpose of the flash proxy gateware bitstream is to give programming software fast JTAG access to the flash connected to the FPGA.
|
||||
|
||||
* Pipistrello and KC705:
|
||||
|
||||
::
|
||||
|
||||
$ cd ~/artiq-dev
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||||
$ wget https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/master/bscan_spi_xc7k325t.bit
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||||
$ wget https://raw.githubusercontent.com/jordens/bscan_spi_bitstreams/master/bscan_spi_xc6slx45.bit
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||||
|
||||
Then move both files ``~/artiq-dev/bscan_spi_xc6slx45.bit`` and ``~/artiq-dev/bscan_spi_xc7k325t.bit`` to ``~/.migen``, ``/usr/local/share/migen``, or ``/usr/share/migen``.
|
||||
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||||
* :ref:`Download and install OpenOCD <install-openocd>`.
|
||||
|
||||
* Download and install MiSoC: ::
|
||||
|
||||
$ cd ~/artiq-dev
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||||
$ git clone --recursive https://github.com/m-labs/misoc
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||||
$ cd misoc
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||||
$ python3.5 setup.py develop --user
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||||
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||||
* Download and install ARTIQ: ::
|
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||||
$ cd ~/artiq-dev
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||||
$ git clone --recursive https://github.com/m-labs/artiq
|
||||
$ cd artiq
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||||
$ python3.5 setup.py develop --user
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||||
|
||||
.. note::
|
||||
If you have any trouble during ARTIQ setup about ``pygit2`` installation,
|
||||
refer to the section dealing with
|
||||
:ref:`installing the host-side software <installing-the-host-side-software>`.
|
||||
|
||||
|
||||
* Build the gateware bitstream, BIOS and runtime by running:
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||||
::
|
||||
|
||||
$ cd ~/artiq-dev
|
||||
$ export PATH=/usr/local/llvm-or1k/bin:$PATH
|
||||
|
||||
.. note:: Make sure that ``/usr/local/llvm-or1k/bin`` is first in your ``PATH``, so that the ``clang`` command you just built is found instead of the system one, if any.
|
||||
|
||||
* For Pipistrello::
|
||||
|
||||
$ python3.5 -m artiq.gateware.targets.pipistrello
|
||||
|
||||
* For KC705::
|
||||
|
||||
$ python3.5 -m artiq.gateware.targets.kc705 -H nist_qc1 # or nist_qc2
|
||||
|
||||
.. note:: Add ``--toolchain vivado`` if you wish to use Vivado instead of ISE.
|
||||
|
||||
* Then, gather the binaries and flash them: ::
|
||||
|
||||
$ mkdir binaries
|
||||
$ cp misoc_nist_qcX_<board>/gateware/top.bit binaries
|
||||
$ cp misoc_nist_qcX_<board>/software/bios/bios.bin binaries
|
||||
$ cp misoc_nist_qcX_<board>/software/runtime/runtime.fbi binaries
|
||||
$ cd binaries
|
||||
$ artiq_flash -d . -t <board>
|
||||
|
||||
.. note:: The `-t` option specifies the board your are targeting. Available options are ``kc705`` and ``pipistrello``.
|
||||
|
||||
* Check that the board boots by running a serial terminal program (you may need to press its FPGA reconfiguration button or power-cycle it to load the gateware bitstream that was newly written into the flash): ::
|
||||
|
||||
$ flterm /dev/ttyUSB1
|
||||
MiSoC BIOS http://m-labs.hk
|
||||
[...]
|
||||
Booting from flash...
|
||||
Loading xxxxx bytes from flash...
|
||||
Executing booted program.
|
||||
ARTIQ runtime built <date/time>
|
||||
|
||||
.. note:: flterm is part of MiSoC. If you installed MiSoC with ``setup.py develop --user``, the flterm launcher is in ``~/.local/bin``.
|
||||
|
||||
The communication parameters are 115200 8-N-1. Ensure that your user has access
|
||||
to the serial device (``sudo adduser $USER dialout`` assuming standard setup).
|
||||
|
||||
.. _installing-the-host-side-software:
|
||||
|
||||
Installing the host-side software
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
* Install the llvmlite Python bindings: ::
|
||||
|
||||
$ cd ~/artiq-dev
|
||||
$ git clone https://github.com/m-labs/llvmlite
|
||||
$ cd llvmlite
|
||||
$ git checkout artiq
|
||||
$ LLVM_CONFIG=/usr/local/llvm-or1k/bin/llvm-config python3.5 setup.py install --user
|
||||
|
||||
* Install ARTIQ: ::
|
||||
|
||||
$ cd ~/artiq-dev
|
||||
$ git clone --recursive https://github.com/m-labs/artiq # if not already done
|
||||
$ cd artiq
|
||||
$ python3.5 setup.py develop --user
|
||||
|
||||
.. note::
|
||||
If you have any trouble during ARTIQ setup about ``pygit2`` installation,
|
||||
you can install it by using ``pip``:
|
||||
|
||||
On Ubuntu 14.04::
|
||||
|
||||
$ python3.5 `which pip3` install --user pygit2==0.19.1
|
||||
|
||||
On Ubuntu 14.10::
|
||||
|
||||
$ python3.5 `which pip3` install --user pygit2==0.20.3
|
||||
|
||||
On Ubuntu 15.04 and 15.10::
|
||||
|
||||
$ python3.5 `which pip3` install --user pygit2==0.22.1
|
||||
|
||||
The rationale behind this is that pygit2 and libgit2 must have the same
|
||||
major.minor version numbers.
|
||||
|
||||
See http://www.pygit2.org/install.html#version-numbers
|
||||
|
||||
* Build the documentation: ::
|
||||
|
||||
$ cd ~/artiq-dev/artiq/doc/manual
|
||||
$ make html
|
Loading…
Reference in New Issue