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kasli_generic: remove rtio clockdomain reference

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mwojcik 2022-10-28 16:51:41 +08:00 committed by Sébastien Bourdeauducq
parent a6856a5e4a
commit 458bd8a927
1 changed files with 1 additions and 1 deletions
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2
artiq/gateware/targets/kasli_generic.py
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@ -64,7 +64,7 @@ class GenericStandalone(StandaloneBase):
self.add_csr_group("grabber", self.grabber_csr_group) self.add_csr_group("grabber", self.grabber_csr_group)
for grabber in self.grabber_csr_group: for grabber in self.grabber_csr_group:
self.platform.add_false_path_constraints( self.platform.add_false_path_constraints(
self.rtio_crg.cd_rtio.clk, getattr(self, grabber).deserializer.cd_cl.clk) self.crg.cd_sys.clk, getattr(self, grabber).deserializer.cd_cl.clk)
class GenericMaster(MasterBase): class GenericMaster(MasterBase):