From 44ec3eae3daef05d3ae8970ee60c8e40907798f4 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Fri, 28 Nov 2014 10:21:43 +0800 Subject: [PATCH] soc/target: use minicon by default --- soc/targets/artiq.py | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/soc/targets/artiq.py b/soc/targets/artiq.py index a57a38111..c381f6740 100644 --- a/soc/targets/artiq.py +++ b/soc/targets/artiq.py @@ -45,8 +45,11 @@ class ARTIQMiniSoC(BaseSoC): } csr_map.update(BaseSoC.csr_map) - def __init__(self, platform, cpu_type="or1k", with_test_gen=False, **kwargs): - BaseSoC.__init__(self, platform, cpu_type=cpu_type, **kwargs) + def __init__(self, platform, cpu_type="or1k", ramcon_type="minicon", + with_test_gen=False, **kwargs): + BaseSoC.__init__(self, platform, + cpu_type=cpu_type, ramcon_type=ramcon_type, + **kwargs) platform.add_extension(_tester_io) self.submodules.leds = gpio.GPIOOut(Cat(