forked from M-Labs/artiq
Merge commit '9d1903a' into rtiobusy
* commit '9d1903a': coredevice/i2c,ttl,spi: consistent device get examples/device_db: remove --no-localhost-bind Monkey-patch asyncio create_server (fixes #253). pipistrello: drop ttls on pmod, add leds back in pipistrello: try with fewer leds/pmod ttl
This commit is contained in:
commit
446dcfbfbc
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@ -34,8 +34,8 @@ class PCA9548:
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On the KC705, this chip is used for selecting the I2C buses on the two FMC
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On the KC705, this chip is used for selecting the I2C buses on the two FMC
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connectors. HPC=1, LPC=2.
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connectors. HPC=1, LPC=2.
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"""
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"""
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def __init__(self, dmgr, busno=0, address=0xe8):
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def __init__(self, dmgr, busno=0, address=0xe8, core_device="core"):
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self.core = dmgr.get("core")
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self.core = dmgr.get(core_device)
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self.busno = busno
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self.busno = busno
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self.address = address
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self.address = address
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@ -77,8 +77,8 @@ class TCA6424A:
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On the NIST QC2 hardware, this chip is used for switching the directions
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On the NIST QC2 hardware, this chip is used for switching the directions
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of TTL buffers."""
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of TTL buffers."""
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def __init__(self, dmgr, busno=0, address=0x44):
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def __init__(self, dmgr, busno=0, address=0x44, core_device="core"):
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self.core = dmgr.get("core")
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self.core = dmgr.get(core_device)
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self.busno = busno
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self.busno = busno
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self.address = address
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self.address = address
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@ -40,8 +40,8 @@ class SPIMaster:
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:param channel: RTIO channel number of the SPI bus to control.
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:param channel: RTIO channel number of the SPI bus to control.
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"""
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"""
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def __init__(self, dmgr, channel):
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def __init__(self, dmgr, channel, core_device="core"):
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self.core = dmgr.get("core")
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self.core = dmgr.get(core_device)
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self.ref_period_mu = seconds_to_mu(self.core.coarse_ref_period,
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self.ref_period_mu = seconds_to_mu(self.core.coarse_ref_period,
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self.core)
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self.core)
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self.channel = channel
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self.channel = channel
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@ -10,8 +10,8 @@ class TTLOut:
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:param channel: channel number
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:param channel: channel number
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"""
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"""
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def __init__(self, dmgr, channel):
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def __init__(self, dmgr, channel, core_device="core"):
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self.core = dmgr.get("core")
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self.core = dmgr.get(core_device)
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self.channel = channel
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self.channel = channel
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# in RTIO cycles
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# in RTIO cycles
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@ -82,8 +82,8 @@ class TTLInOut:
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:param channel: channel number
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:param channel: channel number
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"""
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"""
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def __init__(self, dmgr, channel):
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def __init__(self, dmgr, channel, core_device="core"):
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self.core = dmgr.get("core")
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self.core = dmgr.get(core_device)
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self.channel = channel
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self.channel = channel
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# in RTIO cycles
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# in RTIO cycles
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@ -232,8 +232,8 @@ class TTLClockGen:
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:param channel: channel number
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:param channel: channel number
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"""
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"""
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def __init__(self, dmgr, channel):
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def __init__(self, dmgr, channel, core_device="core"):
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self.core = dmgr.get("core")
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self.core = dmgr.get(core_device)
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self.channel = channel
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self.channel = channel
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# in RTIO cycles
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# in RTIO cycles
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@ -203,13 +203,6 @@ trce -v 12 -fastpaths -tsi {build_name}.tsi -o {build_name}.twr {build_name}.ncd
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spi_pins = self.platform.request("pmod_extended_spi", 0)
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spi_pins = self.platform.request("pmod_extended_spi", 0)
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for i, p in enumerate((spi_pins.int, spi_pins.rst,
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spi_pins.d0, spi_pins.d1)):
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phy = ttl_simple.Inout(p)
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self.submodules += phy
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rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4,
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ofifo_depth=4))
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self.config["RTIO_REGULAR_TTL_COUNT"] = len(rtio_channels)
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self.config["RTIO_REGULAR_TTL_COUNT"] = len(rtio_channels)
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phy = ttl_simple.ClockGen(platform.request("ttl", 15))
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phy = ttl_simple.ClockGen(platform.request("ttl", 15))
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@ -220,7 +213,7 @@ trce -v 12 -fastpaths -tsi {build_name}.tsi -o {build_name}.twr {build_name}.ncd
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self.submodules += phy
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self.submodules += phy
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self.config["RTIO_FIRST_SPI_CHANNEL"] = len(rtio_channels)
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self.config["RTIO_FIRST_SPI_CHANNEL"] = len(rtio_channels)
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rtio_channels.append(rtio.Channel.from_phy(
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rtio_channels.append(rtio.Channel.from_phy(
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phy, ofifo_depth=64, ififo_depth=64))
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phy, ofifo_depth=256, ififo_depth=256))
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self.config["RTIO_DDS_CHANNEL"] = len(rtio_channels)
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self.config["RTIO_DDS_CHANNEL"] = len(rtio_channels)
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self.config["DDS_CHANNEL_COUNT"] = 8
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self.config["DDS_CHANNEL_COUNT"] = 8
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108
artiq/tools.py
108
artiq/tools.py
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@ -7,6 +7,8 @@ import asyncio
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import time
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import time
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import collections
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import collections
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import os
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import os
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import socket
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import itertools
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import atexit
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import atexit
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import string
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import string
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@ -243,3 +245,109 @@ def get_windows_drives():
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drives.append(letter)
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drives.append(letter)
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bitmask >>= 1
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bitmask >>= 1
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return drives
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return drives
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if sys.version_info[:3] == (3, 5, 1):
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# See https://github.com/m-labs/artiq/issues/253
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@asyncio.coroutines.coroutine
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def create_server(self, protocol_factory, host=None, port=None,
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*,
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family=socket.AF_UNSPEC,
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flags=socket.AI_PASSIVE,
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sock=None,
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backlog=100,
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ssl=None,
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reuse_address=None,
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reuse_port=None):
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"""Create a TCP server.
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The host parameter can be a string, in that case the TCP server is bound
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to host and port.
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The host parameter can also be a sequence of strings and in that case
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the TCP server is bound to all hosts of the sequence. If a host
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appears multiple times (possibly indirectly e.g. when hostnames
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resolve to the same IP address), the server is only bound once to that
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host.
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Return a Server object which can be used to stop the service.
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This method is a coroutine.
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"""
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if isinstance(ssl, bool):
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raise TypeError('ssl argument must be an SSLContext or None')
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if host is not None or port is not None:
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if sock is not None:
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raise ValueError(
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'host/port and sock can not be specified at the same time')
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AF_INET6 = getattr(socket, 'AF_INET6', 0)
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if reuse_address is None:
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reuse_address = os.name == 'posix' and sys.platform != 'cygwin'
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sockets = []
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if host == '':
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hosts = [None]
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elif (isinstance(host, str) or
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not isinstance(host, collections.Iterable)):
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hosts = [host]
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else:
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hosts = host
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fs = [self._create_server_getaddrinfo(host, port, family=family,
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flags=flags)
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for host in hosts]
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infos = yield from asyncio.tasks.gather(*fs, loop=self)
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infos = set(itertools.chain.from_iterable(infos))
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completed = False
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try:
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for res in infos:
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af, socktype, proto, canonname, sa = res
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try:
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sock = socket.socket(af, socktype, proto)
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except socket.error:
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# Assume it's a bad family/type/protocol combination.
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if self._debug:
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asyncio.log.logger.warning('create_server() failed to create '
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'socket.socket(%r, %r, %r)',
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af, socktype, proto, exc_info=True)
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continue
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sockets.append(sock)
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if reuse_address:
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sock.setsockopt(
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socket.SOL_SOCKET, socket.SO_REUSEADDR, True)
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if reuse_port:
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if not hasattr(socket, 'SO_REUSEPORT'):
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raise ValueError(
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'reuse_port not supported by socket module')
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else:
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sock.setsockopt(
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socket.SOL_SOCKET, socket.SO_REUSEPORT, True)
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# Disable IPv4/IPv6 dual stack support (enabled by
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# default on Linux) which makes a single socket
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# listen on both address families.
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if af == AF_INET6 and hasattr(socket, 'IPPROTO_IPV6'):
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sock.setsockopt(socket.IPPROTO_IPV6,
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socket.IPV6_V6ONLY,
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True)
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try:
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sock.bind(sa)
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except OSError as err:
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raise OSError(err.errno, 'error while attempting '
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'to bind on address %r: %s'
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% (sa, err.strerror.lower()))
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completed = True
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finally:
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if not completed:
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for sock in sockets:
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sock.close()
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else:
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if sock is None:
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raise ValueError('Neither host/port nor sock were specified')
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sockets = [sock]
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server = asyncio.base_events.Server(self, sockets)
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for sock in sockets:
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sock.listen(backlog)
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sock.setblocking(False)
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self._start_serving(protocol_factory, sock, ssl, server)
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if self._debug:
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asyncio.log.logger.info("%r is serving", server)
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return server
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asyncio.base_events.BaseEventLoop.create_server = create_server
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@ -132,15 +132,7 @@ When plugged to an adapter, the NIST QC1 hardware can be used. The TTL lines are
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+--------------+------------+--------------+
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+--------------+------------+--------------+
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| 21 | USER_LED_4 | Output |
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| 21 | USER_LED_4 | Output |
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+--------------+------------+--------------+
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+--------------+------------+--------------+
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| 22 | PMOD_4 | Input+Output |
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| 22 | TTL15 | Clock |
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+--------------+------------+--------------+
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| 23 | PMOD_5 | Input+Output |
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+--------------+------------+--------------+
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| 24 | PMOD_6 | Input+Output |
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+--------------+------------+--------------+
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| 25 | PMOD_7 | Input+Output |
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+--------------+------------+--------------+
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| 26 | TTL15 | Clock |
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+--------------+------------+--------------+
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+--------------+------------+--------------+
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The input only limitation on channels 0 and 1 comes from the QC-DAQ adapter. When the adapter is not used (and physically unplugged from the Pipistrello board), the corresponding pins on the Pipistrello can be used as outputs. Do not configure these channels as outputs when the adapter is plugged, as this would cause electrical contention.
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The input only limitation on channels 0 and 1 comes from the QC-DAQ adapter. When the adapter is not used (and physically unplugged from the Pipistrello board), the corresponding pins on the Pipistrello can be used as outputs. Do not configure these channels as outputs when the adapter is plugged, as this would cause electrical contention.
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@ -153,5 +145,5 @@ Interface Type 2 (SPI) and 2A (expanded SPI):
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+--------------+--------+--------+--------+--------+
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+--------------+--------+--------+--------+--------+
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| RTIO channel | CS_N | MOSI | MISO | CLK |
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| RTIO channel | CS_N | MOSI | MISO | CLK |
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+==============+========+========+========+========+
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+==============+========+========+========+========+
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| 27 | PMOD_0 | PMOD_1 | PMOD_2 | PMOD_3 |
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| 23 | PMOD_0 | PMOD_1 | PMOD_2 | PMOD_3 |
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+--------------+--------+--------+--------+--------+
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+--------------+--------+--------+--------+--------+
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@ -154,25 +154,25 @@
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# that it always resolves to a network-visible IP address (see documentation).
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# that it always resolves to a network-visible IP address (see documentation).
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"host": "::1",
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"host": "::1",
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"port": 4000,
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"port": 4000,
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"command": "pdq2_controller --no-localhost-bind -p {port} --bind {bind} --simulation --dump qc_q1_0.bin"
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"command": "pdq2_controller -p {port} --bind {bind} --simulation --dump qc_q1_0.bin"
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},
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},
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"qc_q1_1": {
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"qc_q1_1": {
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"type": "controller",
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"type": "controller",
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"host": "::1",
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"host": "::1",
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"port": 4001,
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"port": 4001,
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"command": "pdq2_controller --no-localhost-bind -p {port} --bind {bind} --simulation --dump qc_q1_1.bin"
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"command": "pdq2_controller -p {port} --bind {bind} --simulation --dump qc_q1_1.bin"
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},
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},
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"qc_q1_2": {
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"qc_q1_2": {
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"type": "controller",
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"type": "controller",
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"host": "::1",
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"host": "::1",
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"port": 4002,
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"port": 4002,
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"command": "pdq2_controller --no-localhost-bind -p {port} --bind {bind} --simulation --dump qc_q1_2.bin"
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"command": "pdq2_controller -p {port} --bind {bind} --simulation --dump qc_q1_2.bin"
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},
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},
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"qc_q1_3": {
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"qc_q1_3": {
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"type": "controller",
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"type": "controller",
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"host": "::1",
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"host": "::1",
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"port": 4003,
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"port": 4003,
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"command": "pdq2_controller --no-localhost-bind -p {port} --bind {bind} --simulation --dump qc_q1_3.bin"
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"command": "pdq2_controller -p {port} --bind {bind} --simulation --dump qc_q1_3.bin"
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},
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},
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"electrodes": {
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"electrodes": {
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"type": "local",
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"type": "local",
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