diff --git a/artiq/coredevice/ad9910.py b/artiq/coredevice/ad9910.py
index 53073db3c..2021b2830 100644
--- a/artiq/coredevice/ad9910.py
+++ b/artiq/coredevice/ad9910.py
@@ -441,7 +441,7 @@ class AD9910:
         :param mode: Profile RAM mode (:const:`RAM_MODE_DIRECTSWITCH`,
             :const:`RAM_MODE_RAMPUP`, :const:`RAM_MODE_BIDIR_RAMP`,
             :const:`RAM_MODE_CONT_BIDIR_RAMP`, or
-            :const:`RAM_MODE_CONT_RECIRCULATE`, default:
+            :const:`RAM_MODE_CONT_RAMPUP`, default:
             :const:`RAM_MODE_RAMPUP`)
         """
         hi = (step << 8) | (end >> 2)
diff --git a/artiq/coredevice/spi2.py b/artiq/coredevice/spi2.py
index d6024b607..aa1045973 100644
--- a/artiq/coredevice/spi2.py
+++ b/artiq/coredevice/spi2.py
@@ -187,10 +187,10 @@ class SPIMaster:
         :meth:`__init__`.
 
         .. warning:: If this method is called while recording a DMA
-        sequence, the playback of the sequence will not update the
-        driver state.
-        When required, update the driver state manually (by calling
-        this method) after playing back a DMA sequence.
+           sequence, the playback of the sequence will not update the
+           driver state.
+           When required, update the driver state manually (by calling
+           this method) after playing back a DMA sequence.
 
         :param div: SPI clock divider (see: :meth:`set_config_mu`)
         :param length: SPI transfer length (see: :meth:`set_config_mu`)