forked from M-Labs/artiq
sawg: use ParallelHBFCascade to AA [WIP]
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@ -4,9 +4,10 @@ from migen import *
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from misoc.interconnect.stream import Endpoint
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from misoc.cores.cordic import Cordic
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from .accu import PhasedAccu, Accu
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from .accu import PhasedAccu
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from .tools import eqh, Delay, SatAddMixin
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from .spline import Spline
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from .fir import ParallelHBFUpsampler, halfgen4_cascade
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_Widths = namedtuple("_Widths", "t a p f")
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@ -145,13 +146,17 @@ class Channel(Module, SatAddMixin):
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self.submodules.a1 = a1 = SplineParallelDDS(widths, orders)
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self.submodules.a2 = a2 = SplineParallelDDS(widths, orders)
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coeff = [[int(round((1 << 26) * ci)) for ci in c]
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for c in halfgen4_cascade(parallelism, width=.4, order=8)]
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hbf = [ParallelHBFUpsampler(coeff, width=width, shift=25)
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for i in range(2)]
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self.submodules.b = b = SplineParallelDUC(
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widths._replace(a=len(a1.xo[0]), f=widths.f - width), orders,
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parallelism=parallelism, a_delay=-a1.latency)
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parallelism=parallelism, a_delay=-a1.latency-hbf[0].latency)
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cfg = Config(widths.a)
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u = Spline(width=widths.a, order=orders.a)
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du = Delay(width, a1.latency + b.latency - u.latency)
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self.submodules += cfg, u, du
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du = Delay(width, a1.latency + hbf[0].latency + b.latency - u.latency)
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self.submodules += cfg, u, du, hbf
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self.u = u.tri(widths.t)
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self.i = [cfg.i, self.u, a1.a, a1.f, a1.p, a2.a, a2.f, a2.p, b.f, b.p]
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self.i_names = "cfg u a1 f1 p1 a2 f2 p2 f0 p0".split()
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@ -174,12 +179,14 @@ class Channel(Module, SatAddMixin):
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Cat(a1.clr, a2.clr, b.clr).eq(cfg.clr),
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]
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self.sync += [
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b.i.x.eq(self.sat_add(a1.xo[0], a2.xo[0],
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limits=cfg.limits[0],
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clipped=cfg.clipped[0])),
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b.i.y.eq(self.sat_add(a1.yo[0], a2.yo[0],
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limits=cfg.limits[1],
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clipped=cfg.clipped[1])),
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hbf[0].i.eq(self.sat_add(a1.xo[0], a2.xo[0],
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limits=cfg.limits[0],
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clipped=cfg.clipped[0])),
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hbf[1].i.eq(self.sat_add(a1.yo[0], a2.yo[0],
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limits=cfg.limits[1],
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clipped=cfg.clipped[1])),
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b.i.x.eq(hbf[0].o[0]), # FIXME: rip up
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b.i.y.eq(hbf[1].o[0]),
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eqh(du.i, u.o.a0),
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]
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# wire up outputs and q_{i,o} exchange
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