forked from M-Labs/artiq
move mitll, sysu and ustc device_dbs to kasli_basic
This commit is contained in:
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bdfd993818
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3cbcb3bff6
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from artiq.experiment import *
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class UrukulTest(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.setattr_device("urukul0_cpld")
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self.setattr_device("urukul0_ch0")
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self.setattr_device("urukul0_ch1")
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self.setattr_device("urukul0_ch2")
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self.setattr_device("urukul0_ch3")
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self.setattr_device("led0")
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self.setattr_device("led1")
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self.ttl = self.get_device("ttl0")
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@kernel
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def run(self):
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self.core.reset()
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self.ttl.output()
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delay(1*us)
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self.urukul0_cpld.init()
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self.urukul0_ch0.init()
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self.urukul0_ch1.init()
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self.urukul0_ch2.init()
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self.urukul0_ch3.init()
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delay(1000*us)
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self.urukul0_ch0.set(10*MHz)
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self.urukul0_ch0.sw.on()
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self.urukul0_ch0.set_att(10.)
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delay(1000*us)
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self.urukul0_ch1.set(20*MHz, 0.5)
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self.urukul0_ch1.sw.on()
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self.urukul0_ch1.set_att(8.)
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delay(1000*us)
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self.urukul0_ch2.set(30*MHz)
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self.urukul0_ch2.sw.on()
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self.urukul0_ch2.set_att(6.)
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delay(1000*us)
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self.urukul0_ch3.set(40*MHz)
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self.urukul0_ch3.sw.on()
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self.urukul0_ch3.set_att(4.)
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while True:
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with parallel:
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self.ttl.pulse(100*ms)
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self.urukul0_ch0.sw.pulse(100*ms)
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delay(100*ms)
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self.led0.pulse(100*ms)
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self.led1.pulse(100*ms)
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@ -1,52 +0,0 @@
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from artiq.experiment import *
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class UrukulTest(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.setattr_device("urukul0_cpld")
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self.setattr_device("urukul0_ch0")
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self.setattr_device("urukul0_ch1")
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self.setattr_device("urukul0_ch2")
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self.setattr_device("urukul0_ch3")
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self.setattr_device("led0")
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self.ttl = self.get_device("ttl16")
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@kernel
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def run(self):
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self.core.reset()
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self.ttl.output()
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delay(1*us)
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self.urukul0_cpld.init()
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self.urukul0_ch0.init()
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self.urukul0_ch1.init()
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self.urukul0_ch2.init()
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self.urukul0_ch3.init()
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delay(1000*us)
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self.urukul0_ch0.set(10*MHz)
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self.urukul0_ch0.sw.on()
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self.urukul0_ch0.set_att(10.)
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delay(1000*us)
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self.urukul0_ch1.set(20*MHz, 0.5)
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self.urukul0_ch1.sw.on()
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self.urukul0_ch1.set_att(8.)
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delay(1000*us)
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self.urukul0_ch2.set(30*MHz)
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self.urukul0_ch2.sw.on()
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self.urukul0_ch2.set_att(6.)
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delay(1000*us)
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self.urukul0_ch3.set(40*MHz)
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self.urukul0_ch3.sw.on()
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self.urukul0_ch3.set_att(4.)
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while True:
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with parallel:
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self.ttl.pulse(100*ms)
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self.urukul0_ch0.sw.pulse(100*ms)
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delay(100*ms)
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self.led0.pulse(100*ms)
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@ -1,82 +0,0 @@
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from artiq.experiment import *
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class UrukulTest(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.setattr_device("urukul0_cpld")
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self.setattr_device("urukul0_ch0")
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self.setattr_device("urukul0_ch1")
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self.setattr_device("urukul0_ch2")
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self.setattr_device("urukul0_ch3")
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self.setattr_device("urukul1_cpld")
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self.setattr_device("urukul1_ch0")
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self.setattr_device("urukul1_ch1")
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self.setattr_device("urukul1_ch2")
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self.setattr_device("urukul1_ch3")
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self.setattr_device("led0")
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self.ttl = self.get_device("ttl16")
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@kernel
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def run(self):
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self.core.reset()
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self.ttl.output()
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delay(1*us)
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self.urukul0_cpld.init()
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self.urukul0_ch0.init()
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self.urukul0_ch1.init()
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self.urukul0_ch2.init()
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self.urukul0_ch3.init()
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self.urukul1_cpld.init()
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self.urukul1_ch0.init()
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self.urukul1_ch1.init()
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self.urukul1_ch2.init()
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self.urukul1_ch3.init()
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delay(1000*us)
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self.urukul0_ch0.set(10*MHz)
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self.urukul0_ch0.sw.on()
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self.urukul0_ch0.set_att(10.)
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delay(1000*us)
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self.urukul0_ch1.set(20*MHz, 0.5)
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self.urukul0_ch1.sw.on()
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self.urukul0_ch1.set_att(8.)
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delay(1000*us)
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self.urukul0_ch2.set(30*MHz)
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self.urukul0_ch2.sw.on()
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self.urukul0_ch2.set_att(6.)
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delay(1000*us)
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self.urukul0_ch3.set(40*MHz)
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self.urukul0_ch3.sw.on()
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self.urukul0_ch3.set_att(4.)
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delay(1000*us)
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self.urukul1_ch0.set(15*MHz)
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self.urukul1_ch0.sw.on()
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self.urukul1_ch0.set_att(10.)
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delay(1000*us)
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self.urukul1_ch1.set(25*MHz, 0.5)
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self.urukul1_ch1.sw.on()
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self.urukul1_ch1.set_att(8.)
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delay(1000*us)
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self.urukul1_ch2.set(35*MHz)
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self.urukul1_ch2.sw.on()
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self.urukul1_ch2.set_att(6.)
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delay(1000*us)
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self.urukul1_ch3.set(45*MHz)
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self.urukul1_ch3.sw.on()
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self.urukul1_ch3.set_att(4.)
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while True:
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with parallel:
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self.ttl.pulse(100*ms)
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self.urukul0_ch0.sw.pulse(100*ms)
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delay(100*ms)
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self.led0.pulse(100*ms)
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