forked from M-Labs/artiq
phaser: verify flags in dac_setup
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parent
1117fe191b
commit
3b1d5d7eb6
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@ -30,6 +30,7 @@ class DACSetup(EnvExperiment):
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self.setattr_device("core")
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self.setattr_device("led")
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self.setattr_device("ad9154")
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self.setattr_device("sync")
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@kernel
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def run(self):
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@ -38,10 +39,21 @@ class DACSetup(EnvExperiment):
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self.ad9154.jesd_prbs(0)
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self.ad9154.init()
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self.dac_setup()
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self.busywait_us(200000)
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self.ad9154.jesd_enable(1)
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while not self.ad9154.jesd_ready():
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pass
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if self.ad9154.dac_read(AD9154_CODEGRPSYNCFLG) != 0x0f:
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raise ValueError("no CODEGRPSYNCFLG")
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self.core.break_realtime()
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if not self.sync.sample_get_nonrt():
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pass #raise ValueError("SYNC still low")
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if self.ad9154.dac_read(AD9154_FRAMESYNCFLG) != 0x0f:
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raise ValueError("no FRAMESYNCFLG")
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if self.ad9154.dac_read(AD9154_GOODCHKSUMFLG) != 0x0f:
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raise ValueError("no GOODCHECKSUMFLG")
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if self.ad9154.dac_read(AD9154_INITLANESYNCFLG) != 0x0f:
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raise ValueError("no INITLANESYNCFLG")
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self.monitor()
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@kernel
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def busywait_us(self, t):
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@ -241,6 +253,9 @@ class DACSetup(EnvExperiment):
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# AD9154_ENABLE_SERDESPLL_SET(1) | AD9154_RECAL_SERDESPLL_SET(1))
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self.ad9154.dac_write(AD9154_SERDESPLL_ENABLE_CNTRL,
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AD9154_ENABLE_SERDESPLL_SET(1) | AD9154_RECAL_SERDESPLL_SET(0))
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while not AD9154_SERDES_PLL_LOCK_RB_GET(self.ad9154.dac_read(AD9154_PLL_STATUS)):
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pass
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self.ad9154.dac_write(AD9154_EQ_BIAS_REG, AD9154_EQ_BIAS_RESERVED_SET(0x22) |
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AD9154_EQ_POWER_MODE_SET(1))
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@ -279,8 +294,8 @@ class DACSetup(EnvExperiment):
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AD9154_LINK_EN_SET(0x1) | AD9154_LINK_PAGE_SET(0) |
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AD9154_LINK_MODE_SET(0) | AD9154_CHECKSUM_MODE_SET(0))
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self.busywait_us(1000)
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@kernel
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def monitor(self):
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self.ad9154.dac_write(AD9154_IRQ_STATUS0, 0x00)
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self.ad9154.dac_write(AD9154_IRQ_STATUS1, 0x00)
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self.ad9154.dac_write(AD9154_IRQ_STATUS2, 0x00)
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