forked from M-Labs/artiq
parent
3505878176
commit
37f9c0b10c
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@ -203,7 +203,11 @@ class SPIMaster(Module):
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mosi_oe.eq(
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~config.offline & spi.cs &
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(spi.oe | ~config.half_duplex)),
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clk.eq((spi.cg.clk & spi.cs) ^ config.clk_polarity)
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]
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self.sync += [
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If(spi.cg.ce & spi.cg.edge,
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clk.eq((~spi.cg.clk & spi.cs_next) ^ config.clk_polarity)
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)
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]
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if pads_n is None:
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