From 360be0098fc72902bfefc344a059cdb88e621f35 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Fri, 24 Feb 2017 18:15:27 +0800
Subject: [PATCH] drtio: map local RTIO core on lower channels

---
 artiq/examples/drtio/device_db.pyon          | 38 ++++++++++----------
 artiq/gateware/targets/kc705_drtio_master.py |  2 +-
 2 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/artiq/examples/drtio/device_db.pyon b/artiq/examples/drtio/device_db.pyon
index f8d9e2fb4..d57811ed8 100644
--- a/artiq/examples/drtio/device_db.pyon
+++ b/artiq/examples/drtio/device_db.pyon
@@ -21,25 +21,25 @@
         "class": "CoreCache"
     },
 
-    "rled0": {
+    "led0": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 0},
     },
-    "rled1": {
+    "led1": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 1},
     },
-    "rled2": {
+    "led2": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 2},
     },
-    "rled3": {
+    "led3": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
@@ -51,94 +51,94 @@
         "class": "TTLOut",
         "arguments": {"channel": 4},
     },
-    "rled5": {
+    "led5": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 5},
     },
-    "rled6": {
+    "led6": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 6},
     },
-    "rled7": {
+    "led7": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 7},
     },
 
-    "rsmap": {
+    "smap": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 8}
     },
-    "rsman": {
+    "sman": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 9}
     },
 
-    "led0": {
+    "rled0": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 0x010000},
     },
-    "led1": {
+    "rled1": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 0x010001},
     },
-    "led2": {
+    "rled2": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 0x010002},
     },
-    "led3": {
+    "rled3": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 0x010003},
     },
-    "led4": {
+    "rled4": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 0x010004},
     },
-    "led5": {
+    "rled5": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 0x010005},
     },
-    "led6": {
+    "rled6": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 0x010006},
     },
-    "led7": {
+    "rled7": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 0x010007},
     },
 
-    "smap": {
+    "rsmap": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
         "arguments": {"channel": 0x010008}
     },
-    "sman": {
+    "rsman": {
         "type": "local",
         "module": "artiq.coredevice.ttl",
         "class": "TTLOut",
diff --git a/artiq/gateware/targets/kc705_drtio_master.py b/artiq/gateware/targets/kc705_drtio_master.py
index 0ffe8f241..19951f40c 100755
--- a/artiq/gateware/targets/kc705_drtio_master.py
+++ b/artiq/gateware/targets/kc705_drtio_master.py
@@ -113,7 +113,7 @@ class Master(MiniSoC, AMPSoC):
         self.register_kernel_cpu_csrdevice("rtio_dma")
         self.submodules.cri_con = rtio.CRIInterconnectShared(
             [self.rtio.cri, self.rtio_dma.cri],
-            [self.drtio.cri, self.rtio_core.cri])
+            [self.rtio_core.cri, self.drtio.cri])
 
 
 def main():