forked from M-Labs/artiq
parent
a058be2ede
commit
35c61ce24d
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@ -67,7 +67,7 @@ pub mod crg {
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#[cfg(si5324_as_synthesizer)]
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fn setup_si5324_as_synthesizer() {
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// 125 MHz output from 10 MHz CLKIN2, 504 Hz BW
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// 125 MHz output from 10 MHz CLKINx reference, 504 Hz BW
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#[cfg(all(rtio_frequency = "125.0", si5324_ext_ref, ext_ref_frequency = "10.0"))]
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const SI5324_SETTINGS: si5324::FrequencySettings
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= si5324::FrequencySettings {
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@ -75,12 +75,12 @@ fn setup_si5324_as_synthesizer() {
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nc1_ls : 4,
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n2_hs : 10,
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n2_ls : 300,
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n31 : 75,
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n31 : 6,
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n32 : 6,
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bwsel : 4,
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crystal_ref: false
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};
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// 125MHz output, from 100MHz CLKIN2 reference, 586 Hz loop bandwidth
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// 125MHz output, from 100MHz CLKINx reference, 586 Hz loop bandwidth
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#[cfg(all(rtio_frequency = "125.0", si5324_ext_ref, ext_ref_frequency = "100.0"))]
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const SI5324_SETTINGS: si5324::FrequencySettings
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= si5324::FrequencySettings {
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@ -88,12 +88,12 @@ fn setup_si5324_as_synthesizer() {
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nc1_ls : 4,
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n2_hs : 10,
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n2_ls : 260,
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n31 : 65,
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n31 : 52,
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n32 : 52,
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bwsel : 4,
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crystal_ref: false
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};
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// 125MHz output, from 125MHz CLKIN2 reference, 606 Hz loop bandwidth
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// 125MHz output, from 125MHz CLKINx reference, 606 Hz loop bandwidth
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#[cfg(all(rtio_frequency = "125.0", si5324_ext_ref, ext_ref_frequency = "125.0"))]
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const SI5324_SETTINGS: si5324::FrequencySettings
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= si5324::FrequencySettings {
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@ -114,7 +114,7 @@ fn setup_si5324_as_synthesizer() {
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nc1_ls : 4,
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n2_hs : 10,
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n2_ls : 19972,
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n31 : 4993,
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n31 : 4565,
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n32 : 4565,
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bwsel : 4,
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crystal_ref: true
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@ -127,7 +127,7 @@ fn setup_si5324_as_synthesizer() {
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nc1_ls : 4,
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n2_hs : 10,
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n2_ls : 33732,
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n31 : 9370,
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n31 : 7139,
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n32 : 7139,
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bwsel : 3,
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crystal_ref: true
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@ -140,7 +140,7 @@ fn setup_si5324_as_synthesizer() {
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nc1_ls : 6,
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n2_hs : 10,
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n2_ls : 33732,
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n31 : 9370,
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n31 : 7139,
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n32 : 7139,
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bwsel : 3,
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crystal_ref: true
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