From 332bd6090f5a1494ae736c031a613078f5d48bbe Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Mon, 7 Jan 2019 17:09:19 +0800
Subject: [PATCH] satman: wait for CPLL/QPLL lock after setting
 drtio_transceiver::stable_clkin

---
 artiq/firmware/satman/main.rs | 1 +
 1 file changed, 1 insertion(+)

diff --git a/artiq/firmware/satman/main.rs b/artiq/firmware/satman/main.rs
index ede250c1b..d7f757b99 100644
--- a/artiq/firmware/satman/main.rs
+++ b/artiq/firmware/satman/main.rs
@@ -416,6 +416,7 @@ pub extern fn main() -> i32 {
     unsafe {
         csr::drtio_transceiver::stable_clkin_write(1);
     }
+    clock::spin_us(1500); // wait for CPLL/QPLL lock
     init_rtio_crg();
 
     #[cfg(has_allaki_atts)]