From 2e4d19a1ce1e9b608e832c47962b590c4f989298 Mon Sep 17 00:00:00 2001 From: whitequark Date: Tue, 4 Oct 2016 08:58:21 +0000 Subject: [PATCH] Rust: add some conditional compilation back to rtio_crg. --- artiq/runtime.rs/src/rtio_crg.rs | 58 +++++++++++++++++++++----------- 1 file changed, 38 insertions(+), 20 deletions(-) diff --git a/artiq/runtime.rs/src/rtio_crg.rs b/artiq/runtime.rs/src/rtio_crg.rs index b1867396d..416bab03f 100644 --- a/artiq/runtime.rs/src/rtio_crg.rs +++ b/artiq/runtime.rs/src/rtio_crg.rs @@ -1,8 +1,42 @@ -use board::csr; -use {clock, config}; +use config; + +#[cfg(has_rtio_crg)] +mod imp { + use board::csr; + use clock; + + pub fn init() { + unsafe { csr::rtio_crg::pll_reset_write(0) } + } + + pub fn check() -> bool { + unsafe { csr::rtio_crg::pll_locked_read() != 0 } + } + + pub fn switch_clock(clk: u8) -> bool { + unsafe { + let cur_clk = csr::rtio_crg::clock_sel_read(); + if clk != cur_clk { + csr::rtio_crg::pll_reset_write(1); + csr::rtio_crg::clock_sel_write(clk); + csr::rtio_crg::pll_reset_write(0); + } + } + + clock::spin_us(150); + return check() + } +} + +#[cfg(not(has_rtio_crg))] +mod imp { + pub fn init() {} + pub fn check() -> bool { true } + pub fn switch_clock(clk: u8) -> bool { true } +} pub fn init() { - unsafe { csr::rtio_crg::pll_reset_write(0) } + imp::init(); let mut opt = [b'i']; let clk; @@ -28,20 +62,4 @@ pub fn init() { } } -pub fn check() -> bool { - unsafe { csr::rtio_crg::pll_locked_read() != 0 } -} - -pub fn switch_clock(clk: u8) -> bool { - unsafe { - let cur_clk = csr::rtio_crg::clock_sel_read(); - if clk != cur_clk { - csr::rtio_crg::pll_reset_write(1); - csr::rtio_crg::clock_sel_write(clk); - csr::rtio_crg::pll_reset_write(0); - } - } - - clock::spin_us(150); - return check() -} +pub use self::imp::{check, switch_clock};