forked from M-Labs/artiq
grabber: port to NAC3
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parent
bf8e188868
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2e4233274f
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@ -1,19 +1,23 @@
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from numpy import int32, int64
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from artiq.language.core import *
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from artiq.language.types import *
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from artiq.coredevice.rtio import rtio_output, rtio_input_data
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from artiq.coredevice.core import Core
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@nac3
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class OutOfSyncException(Exception):
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"""Raised when an incorrect number of ROI engine outputs has been
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retrieved from the RTIO input FIFO."""
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pass
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@nac3
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class Grabber:
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"""Driver for the Grabber camera interface."""
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kernel_invariants = {"core", "channel_base", "sentinel"}
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core: KernelInvariant[Core]
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channel_base: KernelInvariant[int32]
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sentinel: KernelInvariant[int32]
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def __init__(self, dmgr, channel_base, res_width=12, count_shift=0,
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core_device="core"):
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@ -26,7 +30,7 @@ class Grabber:
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self.sentinel = int32(int64(2**count_width))
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@kernel
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def setup_roi(self, n, x0, y0, x1, y1):
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def setup_roi(self, n: int32, x0: int32, y0: int32, x1: int32, y1: int32):
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"""
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Defines the coordinates of a ROI.
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@ -50,7 +54,7 @@ class Grabber:
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delay_mu(c)
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@kernel
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def gate_roi(self, mask):
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def gate_roi(self, mask: int32):
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"""
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Defines which ROI engines produce input events.
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@ -70,15 +74,15 @@ class Grabber:
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rtio_output((self.channel_base + 1) << 8, mask)
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@kernel
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def gate_roi_pulse(self, mask, dt):
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def gate_roi_pulse(self, mask: int32, dt: float):
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"""Sets a temporary mask for the specified duration (in seconds), before
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disabling all ROI engines."""
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self.gate_roi(mask)
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delay(dt)
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self.core.delay(dt)
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self.gate_roi(0)
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@kernel
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def input_mu(self, data):
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def input_mu(self, data: list[int32]):
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"""
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Retrieves the accumulated values for one frame from the ROI engines.
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Blocks until values are available.
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@ -96,10 +100,10 @@ class Grabber:
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sentinel = rtio_input_data(channel)
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if sentinel != self.sentinel:
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raise OutOfSyncException
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raise OutOfSyncException()
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for i in range(len(data)):
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roi_output = rtio_input_data(channel)
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if roi_output == self.sentinel:
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raise OutOfSyncException
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raise OutOfSyncException()
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data[i] = roi_output
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@ -32,6 +32,10 @@
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"bank_direction_low": "input",
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"bank_direction_high": "output",
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"edge_counter": true
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},
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{
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"type": "grabber",
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"ports": [6]
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}
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]
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}
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@ -8,6 +8,7 @@ from artiq.coredevice.urukul import CPLD as UrukulCPLD
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from artiq.coredevice.ad9912 import AD9912
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from artiq.coredevice.sampler import Sampler
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from artiq.coredevice.edge_counter import EdgeCounter
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from artiq.coredevice.grabber import Grabber
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@nac3
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@ -21,6 +22,7 @@ class NAC3Devices(EnvExperiment):
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urukul0_ch0: KernelInvariant[AD9912]
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sampler0: KernelInvariant[Sampler]
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ttl0_counter: KernelInvariant[EdgeCounter]
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grabber0: KernelInvariant[Grabber]
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def build(self):
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self.setattr_device("core")
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@ -32,6 +34,7 @@ class NAC3Devices(EnvExperiment):
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self.setattr_device("urukul0_ch0")
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self.setattr_device("sampler0")
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self.setattr_device("ttl0_counter")
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self.setattr_device("grabber0")
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@kernel
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def run(self):
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