forked from M-Labs/artiq
1
0
Fork 0

firmware: remove minor or1k leftovers

This commit is contained in:
Sebastien Bourdeauducq 2021-09-12 20:03:37 +08:00
parent 1a0c4219ec
commit 2d79d824f9
2 changed files with 0 additions and 6 deletions

View File

@ -58,9 +58,6 @@ struct ExceptionInfo {
#[cfg(target_arch = "x86_64")] #[cfg(target_arch = "x86_64")]
const UNWIND_DATA_REG: (i32, i32) = (0, 1); // RAX, RDX const UNWIND_DATA_REG: (i32, i32) = (0, 1); // RAX, RDX
#[cfg(any(target_arch = "or1k"))]
const UNWIND_DATA_REG: (i32, i32) = (3, 4); // R3, R4
#[cfg(any(target_arch = "riscv32"))] #[cfg(any(target_arch = "riscv32"))]
const UNWIND_DATA_REG: (i32, i32) = (10, 11); // X10, X11 const UNWIND_DATA_REG: (i32, i32) = (10, 11); // X10, X11

View File

@ -31,9 +31,6 @@ const UNWIND_DATA_REG: (i32, i32) = (0, 2); // EAX, EDX
#[cfg(target_arch = "x86_64")] #[cfg(target_arch = "x86_64")]
const UNWIND_DATA_REG: (i32, i32) = (0, 1); // RAX, RDX const UNWIND_DATA_REG: (i32, i32) = (0, 1); // RAX, RDX
#[cfg(any(target_arch = "or1k"))]
const UNWIND_DATA_REG: (i32, i32) = (3, 4); // R3, R4
#[cfg(any(target_arch = "riscv32"))] #[cfg(any(target_arch = "riscv32"))]
const UNWIND_DATA_REG: (i32, i32) = (10, 11); // X10, X11 const UNWIND_DATA_REG: (i32, i32) = (10, 11); // X10, X11