forked from M-Labs/artiq
coredevice/ttl: fix imports
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@ -2,7 +2,9 @@ import numpy
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from artiq.language.core import *
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from artiq.language.types import *
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from artiq.coredevice.rtio import rtio_output, rtio_input_timestamp
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from artiq.coredevice.rtio import (rtio_output, rtio_input_timestamp,
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rtio_input_data)
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from artiq.coredevice.exceptions import RTIOOverflow
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# RTIO TTL address map:
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