forked from M-Labs/artiq
phaser: DDS config dummies
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@ -565,6 +565,15 @@ class Phaser(_NIST_Ions):
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self.config["RTIO_LOG_CHANNEL"] = len(rtio_channels)
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rtio_channels.append(rtio.LogChannel())
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# FIXME: dummy
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self.config["RTIO_FIRST_DDS_CHANNEL"] = 0
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self.config["RTIO_DDS_COUNT"] = 1
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self.config["DDS_CHANNELS_PER_BUS"] = 1
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self.config["DDS_AD9914"] = True
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self.config["DDS_ONEHOT_SEL"] = True
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self.config["DDS_RTIO_CLK_RATIO"] = 3
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self.add_rtio(rtio_channels, _PhaserCRG(platform, self.crg.cd_sys.clk))
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self.comb += self.rtio_crg.refclk.eq(self.ad9154.jesd.cd_jesd.clk)
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