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firmware: move clock to libboard

This commit is contained in:
Sebastien Bourdeauducq 2017-01-01 18:23:27 +01:00
parent bb056c1d2c
commit 26e7f68b5d
8 changed files with 25 additions and 25 deletions

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@ -1,4 +1,5 @@
use csr; use csr;
use clock;
mod ad9154_reg; mod ad9154_reg;
fn spi_setup() { fn spi_setup() {
@ -133,13 +134,13 @@ fn dac_setup() -> Result<(), &'static str> {
0*ad9154_reg::LSBFIRST_M | 0*ad9154_reg::LSBFIRST | 0*ad9154_reg::LSBFIRST_M | 0*ad9154_reg::LSBFIRST |
0*ad9154_reg::ADDRINC_M | 0*ad9154_reg::ADDRINC | 0*ad9154_reg::ADDRINC_M | 0*ad9154_reg::ADDRINC |
1*ad9154_reg::SDOACTIVE_M | 1*ad9154_reg::SDOACTIVE); 1*ad9154_reg::SDOACTIVE_M | 1*ad9154_reg::SDOACTIVE);
busywait_us(100); clock::spin_us(100);
write(ad9154_reg::SPI_INTFCONFA, write(ad9154_reg::SPI_INTFCONFA,
0*ad9154_reg::SOFTRESET_M | 0*ad9154_reg::SOFTRESET | 0*ad9154_reg::SOFTRESET_M | 0*ad9154_reg::SOFTRESET |
0*ad9154_reg::LSBFIRST_M | 0*ad9154_reg::LSBFIRST | 0*ad9154_reg::LSBFIRST_M | 0*ad9154_reg::LSBFIRST |
0*ad9154_reg::ADDRINC_M | 0*ad9154_reg::ADDRINC | 0*ad9154_reg::ADDRINC_M | 0*ad9154_reg::ADDRINC |
1*ad9154_reg::SDOACTIVE_M | 1*ad9154_reg::SDOACTIVE); 1*ad9154_reg::SDOACTIVE_M | 1*ad9154_reg::SDOACTIVE);
busywait_us(100); clock::spin_us(100);
if read(ad9154_reg::PRODIDH) as u16 << 8 | if read(ad9154_reg::PRODIDH) as u16 << 8 |
read(ad9154_reg::PRODIDL) as u16 != 0x9154 { read(ad9154_reg::PRODIDL) as u16 != 0x9154 {
return Err("AD9154 not found") return Err("AD9154 not found")
@ -149,7 +150,7 @@ fn dac_setup() -> Result<(), &'static str> {
0*ad9154_reg::PD_DAC0 | 0*ad9154_reg::PD_DAC1 | 0*ad9154_reg::PD_DAC0 | 0*ad9154_reg::PD_DAC1 |
0*ad9154_reg::PD_DAC2 | 0*ad9154_reg::PD_DAC3 | 0*ad9154_reg::PD_DAC2 | 0*ad9154_reg::PD_DAC3 |
0*ad9154_reg::PD_BG); 0*ad9154_reg::PD_BG);
busywait_us(100); clock::spin_us(100);
write(ad9154_reg::TXENMASK1, 0*ad9154_reg::DACA_MASK | write(ad9154_reg::TXENMASK1, 0*ad9154_reg::DACA_MASK |
0*ad9154_reg::DACB_MASK); // TX not controlled by TXEN pins 0*ad9154_reg::DACB_MASK); // TX not controlled by TXEN pins
write(ad9154_reg::CLKCFG0, write(ad9154_reg::CLKCFG0,
@ -348,7 +349,7 @@ fn dac_setup() -> Result<(), &'static str> {
0x9*ad9154_reg::SYNCMODE | 1*ad9154_reg::SYNCENABLE | 0x9*ad9154_reg::SYNCMODE | 1*ad9154_reg::SYNCENABLE |
1*ad9154_reg::SYNCARM | 0*ad9154_reg::SYNCCLRSTKY | 1*ad9154_reg::SYNCARM | 0*ad9154_reg::SYNCCLRSTKY |
0*ad9154_reg::SYNCCLRLAST); 0*ad9154_reg::SYNCCLRLAST);
busywait_us(1000); // ensure at least one sysref edge clock::spin_us(1000); // ensure at least one sysref edge
if read(ad9154_reg::SYNC_STATUS) & ad9154_reg::SYNC_LOCK == 0: if read(ad9154_reg::SYNC_STATUS) & ad9154_reg::SYNC_LOCK == 0:
return Err("no sync lock") return Err("no sync lock")
write(ad9154_reg::XBAR_LN_0_1, write(ad9154_reg::XBAR_LN_0_1,
@ -413,15 +414,15 @@ fn cfg() -> Result<(), &'static str> {
jesd_enable(false); jesd_enable(false);
jesd_prbs(false); jesd_prbs(false);
jesd_stpl(false); jesd_stpl(false);
busywait_us(10000); clock::spin_us(10000);
jesd_enable(true); jesd_enable(true);
dac_setup(); dac_setup();
jesd_enable(false); jesd_enable(false);
busywait_us(10000); clock::spin_us(10000);
jesd_enable(true); jesd_enable(true);
monitor(); monitor();
while !jesd_ready() {} while !jesd_ready() {}
busywait_us(10000); clock::spin_us(10000);
if read(ad9154_reg::CODEGRPSYNCFLG) != 0x0f { if read(ad9154_reg::CODEGRPSYNCFLG) != 0x0f {
return Err("bad CODEGRPSYNCFLG") return Err("bad CODEGRPSYNCFLG")
} }

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@ -1,4 +1,4 @@
use board::csr; use csr;
const INIT: u64 = ::core::i64::MAX as u64; const INIT: u64 = ::core::i64::MAX as u64;
const FREQ: u64 = csr::CONFIG_CLOCK_FREQUENCY as u64; const FREQ: u64 = csr::CONFIG_CLOCK_FREQUENCY as u64;

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@ -7,6 +7,7 @@ include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/mem.rs"));
include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/csr.rs")); include!(concat!(env!("BUILDINC_DIRECTORY"), "/generated/csr.rs"));
pub mod spr; pub mod spr;
pub mod irq; pub mod irq;
pub mod clock;
extern { extern {
pub fn flush_cpu_dcache(); pub fn flush_cpu_dcache();

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@ -58,7 +58,6 @@ pub extern fn panic_fmt(args: self::core::fmt::Arguments, file: &'static str, li
} }
mod config; mod config;
mod clock;
mod rtio_mgt; mod rtio_mgt;
mod mailbox; mod mailbox;
mod rpc_queue; mod rpc_queue;
@ -102,14 +101,14 @@ pub unsafe extern fn rust_main() {
static mut LOG_BUFFER: [u8; 65536] = [0; 65536]; static mut LOG_BUFFER: [u8; 65536] = [0; 65536];
BufferLogger::new(&mut LOG_BUFFER[..]) BufferLogger::new(&mut LOG_BUFFER[..])
.register(move || { .register(move || {
clock::init(); board::clock::init();
info!("booting ARTIQ"); info!("booting ARTIQ");
info!("software version {}", GIT_COMMIT); info!("software version {}", GIT_COMMIT);
info!("gateware version {}", board::ident(&mut [0; 64])); info!("gateware version {}", board::ident(&mut [0; 64]));
let t = clock::get_ms(); let t = board::clock::get_ms();
info!("press 'e' to erase startup and idle kernels..."); info!("press 'e' to erase startup and idle kernels...");
while clock::get_ms() < t + 1000 { while board::clock::get_ms() < t + 1000 {
if readchar_nonblock() != 0 && readchar() == b'e' as libc::c_char { if readchar_nonblock() != 0 && readchar() == b'e' as libc::c_char {
config::remove("startup_kernel"); config::remove("startup_kernel");
config::remove("idle_kernel"); config::remove("idle_kernel");
@ -149,10 +148,10 @@ pub unsafe extern fn isr() {
#[no_mangle] #[no_mangle]
pub fn sys_now() -> u32 { pub fn sys_now() -> u32 {
clock::get_ms() as u32 board::clock::get_ms() as u32
} }
#[no_mangle] #[no_mangle]
pub fn sys_jiffies() -> u32 { pub fn sys_jiffies() -> u32 {
clock::get_ms() as u32 board::clock::get_ms() as u32
} }

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@ -2,7 +2,7 @@ use core::{mem, ptr};
use core::cell::{Cell, RefCell}; use core::cell::{Cell, RefCell};
use log::{self, Log, LogLevel, LogMetadata, LogRecord, LogLevelFilter}; use log::{self, Log, LogLevel, LogMetadata, LogRecord, LogLevelFilter};
use log_buffer::LogBuffer; use log_buffer::LogBuffer;
use clock; use board;
pub struct BufferLogger { pub struct BufferLogger {
buffer: RefCell<LogBuffer<&'static mut [u8]>>, buffer: RefCell<LogBuffer<&'static mut [u8]>>,
@ -70,13 +70,13 @@ impl Log for BufferLogger {
use core::fmt::Write; use core::fmt::Write;
writeln!(self.buffer.borrow_mut(), writeln!(self.buffer.borrow_mut(),
"[{:12}us] {:>5}({}): {}", "[{:12}us] {:>5}({}): {}",
clock::get_us(), record.level(), record.target(), record.args()).unwrap(); board::clock::get_us(), record.level(), record.target(), record.args()).unwrap();
// Printing to UART is really slow, so avoid doing that when we have an alternative // Printing to UART is really slow, so avoid doing that when we have an alternative
// route to retrieve the debug messages. // route to retrieve the debug messages.
if self.trace_to_uart.get() || record.level() <= LogLevel::Info { if self.trace_to_uart.get() || record.level() <= LogLevel::Info {
println!("[{:12}us] {:>5}({}): {}", println!("[{:12}us] {:>5}({}): {}",
clock::get_us(), record.level(), record.target(), record.args()); board::clock::get_us(), record.level(), record.target(), record.args());
} }
} }
} }

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@ -4,8 +4,7 @@ use sched::Scheduler;
#[cfg(has_rtio_crg)] #[cfg(has_rtio_crg)]
pub mod crg { pub mod crg {
use clock; use board::{clock, csr};
use board::csr;
pub fn init() { pub fn init() {
unsafe { csr::rtio_crg::pll_reset_write(0) } unsafe { csr::rtio_crg::pll_reset_write(0) }

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@ -6,7 +6,7 @@ use std::io::{Read, Write, Result, Error, ErrorKind};
use fringe::OwnedStack; use fringe::OwnedStack;
use fringe::generator::{Generator, Yielder, State as GeneratorState}; use fringe::generator::{Generator, Yielder, State as GeneratorState};
use lwip; use lwip;
use clock; use board;
use urc::Urc; use urc::Urc;
#[derive(Debug)] #[derive(Debug)]
@ -106,7 +106,7 @@ impl Scheduler {
if self.threads.len() == 0 { return } if self.threads.len() == 0 { return }
let now = clock::get_ms(); let now = board::clock::get_ms();
let start_index = self.index; let start_index = self.index;
loop { loop {
@ -216,7 +216,7 @@ pub struct Waiter<'a>(&'a Yielder<WaitResult, WaitRequest, OwnedStack>);
impl<'a> Waiter<'a> { impl<'a> Waiter<'a> {
pub fn sleep(&self, duration_ms: u64) -> Result<()> { pub fn sleep(&self, duration_ms: u64) -> Result<()> {
let request = WaitRequest { let request = WaitRequest {
timeout: Some(clock::get_ms() + duration_ms), timeout: Some(board::clock::get_ms() + duration_ms),
event: None event: None
}; };

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@ -3,7 +3,7 @@ use std::{mem, str};
use std::cell::RefCell; use std::cell::RefCell;
use std::io::{self, Read, Write, BufWriter}; use std::io::{self, Read, Write, BufWriter};
use std::btree_set::BTreeSet; use std::btree_set::BTreeSet;
use {config, rtio_mgt, clock, mailbox, rpc_queue, kernel}; use {config, rtio_mgt, mailbox, rpc_queue, kernel};
use logger::BufferLogger; use logger::BufferLogger;
use cache::Cache; use cache::Cache;
use urc::Urc; use urc::Urc;
@ -58,7 +58,7 @@ enum KernelState {
struct Session<'a> { struct Session<'a> {
congress: &'a mut Congress, congress: &'a mut Congress,
kernel_state: KernelState, kernel_state: KernelState,
watchdog_set: clock::WatchdogSet, watchdog_set: board::clock::WatchdogSet,
log_buffer: String, log_buffer: String,
interner: BTreeSet<String> interner: BTreeSet<String>
} }
@ -68,7 +68,7 @@ impl<'a> Session<'a> {
Session { Session {
congress: congress, congress: congress,
kernel_state: KernelState::Absent, kernel_state: KernelState::Absent,
watchdog_set: clock::WatchdogSet::new(), watchdog_set: board::clock::WatchdogSet::new(),
log_buffer: String::new(), log_buffer: String::new(),
interner: BTreeSet::new() interner: BTreeSet::new()
} }