From 257bef0d212834fad2a48f0bcc28696720dd8957 Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Mon, 5 Mar 2018 15:35:21 +0100 Subject: [PATCH] slave_fpga: print more info --- artiq/firmware/libboard_artiq/slave_fpga.rs | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/artiq/firmware/libboard_artiq/slave_fpga.rs b/artiq/firmware/libboard_artiq/slave_fpga.rs index 3046fec31..2a7377ff4 100644 --- a/artiq/firmware/libboard_artiq/slave_fpga.rs +++ b/artiq/firmware/libboard_artiq/slave_fpga.rs @@ -45,17 +45,20 @@ pub fn load() -> Result<(), &'static str> { if csr::slave_fpga_cfg::in_read() & DONE_BIT != 0 { info!("DONE before loading"); } + if csr::slave_fpga_cfg::in_read() & INIT_B_BIT == 0 { + info!("INIT asserted before loading"); + } csr::slave_fpga_cfg::out_write(0); csr::slave_fpga_cfg::oe_write(CCLK_BIT | DIN_BIT | PROGRAM_B_BIT); clock::spin_us(1_000); // TPROGRAM=250ns min, be_generous if csr::slave_fpga_cfg::in_read() & INIT_B_BIT != 0 { - return Err("Did not react to PROGRAM"); + return Err("Did not assert INIT in reaction to PROGRAM"); } csr::slave_fpga_cfg::out_write(PROGRAM_B_BIT); clock::spin_us(10_000); // TPL=5ms max if csr::slave_fpga_cfg::in_read() & INIT_B_BIT == 0 { - return Err("Did not exit INIT"); + return Err("Did not exit INIT after releasing PROGRAM"); } for i in slice::from_raw_parts(GATEWARE.offset(8), length) {