forked from M-Labs/artiq
Commit missing parts of 948ed6fb
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@ -8,6 +8,7 @@ from math import sqrt
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from artiq.experiment import *
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from artiq.test.hardware_testbench import ExperimentCase
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from artiq.coredevice import exceptions
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from artiq.coredevice.comm_mgmt import CommMgmt
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from artiq.coredevice.comm_analyzer import (StoppedMessage, OutputMessage, InputMessage,
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decode_dump, get_analyzer_dump)
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@ -387,18 +388,22 @@ class CoredeviceTest(ExperimentCase):
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self.execute(SequenceError)
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def test_collision(self):
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comm = self.device_mgr.get("core").comm
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comm.clear_log()
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core_addr = self.device_mgr.get_desc("comm")["arguments"]["host"]
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mgmt = CommMgmt(self.device_mgr, core_addr)
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mgmt.clear_log()
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self.execute(Collision)
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log = comm.get_log()
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log = mgmt.get_log()
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self.assertIn("RTIO collision", log)
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mgmt.close()
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def test_address_collision(self):
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comm = self.device_mgr.get("core").comm
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comm.clear_log()
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core_addr = self.device_mgr.get_desc("comm")["arguments"]["host"]
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mgmt = CommMgmt(self.device_mgr, core_addr)
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mgmt.clear_log()
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self.execute(AddressCollision)
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log = comm.get_log()
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log = mgmt.get_log()
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self.assertIn("RTIO collision", log)
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mgmt.close()
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def test_watchdog(self):
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# watchdog only works on the device
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