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kc705: use misoc clock for false path

This commit is contained in:
Sebastien Bourdeauducq 2016-10-30 11:12:36 +08:00
parent cd68577dbc
commit 2392113bb6
1 changed files with 1 additions and 1 deletions
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2
artiq/gateware/targets/kc705.py
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@ -149,7 +149,7 @@ class _NIST_Ions(MiniSoC, AMPSoC):
self.rtio_crg.cd_rtio.clk.attr.add("keep") self.rtio_crg.cd_rtio.clk.attr.add("keep")
self.platform.add_period_constraint(self.rtio_crg.cd_rtio.clk, 8.) self.platform.add_period_constraint(self.rtio_crg.cd_rtio.clk, 8.)
self.platform.add_false_path_constraints( self.platform.add_false_path_constraints(
self.rtio.cd_rsys.clk, self.crg.cd_sys.clk,
self.rtio_crg.cd_rtio.clk) self.rtio_crg.cd_rtio.clk)
self.submodules.rtio_analyzer = rtio.Analyzer(self.rtio, self.submodules.rtio_analyzer = rtio.Analyzer(self.rtio,