From 225f7d73022dbcc8abc314ea911190d8ddf388ac Mon Sep 17 00:00:00 2001
From: whitequark <whitequark@whitequark.org>
Date: Sun, 10 Jan 2016 20:01:20 +0000
Subject: [PATCH] Commit missing parts of 9366a29.

---
 artiq/coredevice/core.py       |  2 +-
 artiq/runtime/session.c        |  9 +++++--
 artiq/test/coredevice/cache.py | 44 ++++++++++++++++++++++++++++++++++
 3 files changed, 52 insertions(+), 3 deletions(-)
 create mode 100644 artiq/test/coredevice/cache.py

diff --git a/artiq/coredevice/core.py b/artiq/coredevice/core.py
index 67b704ac5..b7f1f7276 100644
--- a/artiq/coredevice/core.py
+++ b/artiq/coredevice/core.py
@@ -42,7 +42,7 @@ def cache_get(key: TStr) -> TList(TInt32):
     raise NotImplementedError("syscall not simulated")
 
 @syscall
-def cache_put(key: TStr, value: TList(TInt32)):
+def cache_put(key: TStr, value: TList(TInt32)) -> TNone:
     raise NotImplementedError("syscall not simulated")
 
 class Core:
diff --git a/artiq/runtime/session.c b/artiq/runtime/session.c
index b32634ff1..94ed98591 100644
--- a/artiq/runtime/session.c
+++ b/artiq/runtime/session.c
@@ -940,9 +940,12 @@ static int process_kmsg(struct msg_base *umsg)
         case MESSAGE_TYPE_FINISHED:
             out_packet_empty(REMOTEMSG_TYPE_KERNEL_FINISHED);
 
+            for(struct cache_row *iter = cache; iter; iter = iter->next)
+                iter->borrowed = 0;
+
             kloader_stop();
             user_kernel_state = USER_KERNEL_LOADED;
-            mailbox_acknowledge();
+
             break;
 
         case MESSAGE_TYPE_EXCEPTION: {
@@ -1031,9 +1034,11 @@ static int process_kmsg(struct msg_base *umsg)
             }
 
             if(!row) {
-                struct cache_row *row = calloc(1, sizeof(struct cache_row));
+                row = calloc(1, sizeof(struct cache_row));
                 row->key = calloc(strlen(request->key) + 1, 1);
                 strcpy(row->key, request->key);
+                row->next = cache;
+                cache = row;
             }
 
             if(!row->borrowed) {
diff --git a/artiq/test/coredevice/cache.py b/artiq/test/coredevice/cache.py
new file mode 100644
index 000000000..68033b142
--- /dev/null
+++ b/artiq/test/coredevice/cache.py
@@ -0,0 +1,44 @@
+from artiq.language import *
+from artiq.coredevice.exceptions import *
+from artiq.test.hardware_testbench import ExperimentCase
+
+
+class _Cache(EnvExperiment):
+    def build(self):
+        self.setattr_device("core")
+        self.print = lambda x: print(x)
+
+    @kernel
+    def get(self, key):
+        return self.core.get_cache(key)
+
+    @kernel
+    def put(self, key, value):
+        self.core.put_cache(key, value)
+
+    @kernel
+    def get_put(self, key, value):
+        self.get(key)
+        self.put(key, value)
+
+class CacheTest(ExperimentCase):
+    def test_get_empty(self):
+        exp = self.create(_Cache)
+        self.assertEqual(exp.get("x1"), [])
+
+    def test_put_get(self):
+        exp = self.create(_Cache)
+        exp.put("x2", [1, 2, 3])
+        self.assertEqual(exp.get("x2"), [1, 2, 3])
+
+    def test_replace(self):
+        exp = self.create(_Cache)
+        exp.put("x3", [1, 2, 3])
+        exp.put("x3", [1, 2, 3, 4, 5])
+        self.assertEqual(exp.get("x3"), [1, 2, 3, 4, 5])
+
+    def test_borrow(self):
+        exp = self.create(_Cache)
+        exp.put("x4", [1, 2, 3])
+        with self.assertRaises(CacheError):
+            exp.get_put("x4", [])