forked from M-Labs/artiq
kasli: remove opticlock (moved to kasli_generic)
This commit is contained in:
parent
436662be52
commit
21021beb08
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@ -1,415 +0,0 @@
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# This is an example device database that needs to be adapted to your setup.
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# The list of devices here is not exhaustive.
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core_addr = "hunt.ptb.quartiq.de"
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device_db = {
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"core": {
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"type": "local",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"arguments": {"host": core_addr, "ref_period": 1e-9}
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},
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"core_log": {
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"type": "controller",
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"host": "::1",
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"port": 1068,
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"command": "aqctl_corelog -p {port} --bind {bind} " + core_addr
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},
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"core_cache": {
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"type": "local",
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"module": "artiq.coredevice.cache",
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"class": "CoreCache"
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},
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"core_dma": {
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"type": "local",
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"module": "artiq.coredevice.dma",
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"class": "CoreDMA"
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},
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"i2c_switch0": {
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"type": "local",
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"module": "artiq.coredevice.i2c",
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"class": "PCA9548",
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"arguments": {"address": 0xe0}
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},
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"i2c_switch1": {
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"type": "local",
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"module": "artiq.coredevice.i2c",
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"class": "PCA9548",
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"arguments": {"address": 0xe2}
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},
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"ttl0": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLInOut",
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"arguments": {"channel": 0},
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},
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"ttl1": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLInOut",
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"arguments": {"channel": 1},
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},
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"ttl2": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLInOut",
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"arguments": {"channel": 2},
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},
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"ttl3": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLInOut",
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"arguments": {"channel": 3},
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},
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"ttl4": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 4},
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},
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"ttl5": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 5},
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},
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"ttl6": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 6},
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},
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"ttl7": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 7},
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},
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"ttl8": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 8},
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},
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"ttl9": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 9},
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},
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"ttl10": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 10},
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},
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"ttl11": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 11},
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},
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"ttl12": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 12},
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},
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"ttl13": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 13},
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},
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"ttl14": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 14},
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},
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"ttl15": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 15},
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},
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"ttl16": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 16},
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},
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"ttl17": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 17},
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},
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"ttl18": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 18},
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},
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"ttl19": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 19},
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},
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"ttl20": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 20},
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},
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"ttl21": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 21},
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},
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"ttl22": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 22},
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},
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"ttl23": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 23},
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},
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"spi_novogorny0": {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 24}
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},
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"ttl_novogorny0_cnv": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 25}
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},
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"novogorny0": {
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"type": "local",
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"module": "artiq.coredevice.novogorny",
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"class": "Novogorny",
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"arguments": {
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"spi_device": "spi_novogorny0",
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"cnv_device": "ttl_novogorny0_cnv",
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}
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},
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"spi_urukul0": {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 26}
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},
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"ttl_urukul0_io_update": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 27}
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},
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"ttl_urukul0_sw0": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 28}
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},
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"ttl_urukul0_sw1": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 29}
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},
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"ttl_urukul0_sw2": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 30}
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},
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"ttl_urukul0_sw3": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 31}
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},
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"urukul0_cpld": {
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"type": "local",
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"module": "artiq.coredevice.urukul",
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"class": "CPLD",
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"arguments": {
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"spi_device": "spi_urukul0",
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"io_update_device": "ttl_urukul0_io_update",
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"refclk": 100e6,
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"clk_sel": 1
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}
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},
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"urukul0_ch0": {
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"type": "local",
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"module": "artiq.coredevice.ad9912",
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"class": "AD9912",
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"arguments": {
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"pll_n": 10,
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"chip_select": 4,
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"cpld_device": "urukul0_cpld",
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"sw_device": "ttl_urukul0_sw0"
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}
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},
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"urukul0_ch1": {
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"type": "local",
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"module": "artiq.coredevice.ad9912",
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"class": "AD9912",
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"arguments": {
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"pll_n": 10,
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"chip_select": 5,
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"cpld_device": "urukul0_cpld",
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"sw_device": "ttl_urukul0_sw1"
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}
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},
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"urukul0_ch2": {
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"type": "local",
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"module": "artiq.coredevice.ad9912",
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"class": "AD9912",
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"arguments": {
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"pll_n": 10,
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"chip_select": 6,
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"cpld_device": "urukul0_cpld",
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"sw_device": "ttl_urukul0_sw2"
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}
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},
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"urukul0_ch3": {
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"type": "local",
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"module": "artiq.coredevice.ad9912",
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"class": "AD9912",
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"arguments": {
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"pll_n": 10,
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"chip_select": 7,
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"cpld_device": "urukul0_cpld",
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"sw_device": "ttl_urukul0_sw3"
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}
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},
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"led0": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 32}
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},
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"led1": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 33}
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},
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"spi_urukul1": {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 34}
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},
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"ttl_urukul1_sync": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLClockGen",
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"arguments": {"channel": 35, "acc_width": 4}
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},
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"ttl_urukul1_io_update": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 36}
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},
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"urukul1_cpld": {
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"type": "local",
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"module": "artiq.coredevice.urukul",
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"class": "CPLD",
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"arguments": {
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"spi_device": "spi_urukul1",
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"sync_device": "ttl_urukul1_sync",
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"io_update_device": "ttl_urukul1_io_update",
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"refclk": 100e6,
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"clk_sel": 1
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}
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},
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"urukul1_ch0": {
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"type": "local",
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"module": "artiq.coredevice.ad9910",
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"class": "AD9910",
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"arguments": {
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"pll_n": 40,
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"chip_select": 4,
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"cpld_device": "urukul1_cpld"
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}
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},
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"urukul1_ch1": {
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"type": "local",
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"module": "artiq.coredevice.ad9910",
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"class": "AD9910",
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"arguments": {
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"pll_n": 40,
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"chip_select": 5,
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"cpld_device": "urukul1_cpld"
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}
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},
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"urukul1_ch2": {
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"type": "local",
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"module": "artiq.coredevice.ad9910",
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"class": "AD9910",
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"arguments": {
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"pll_n": 40,
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"chip_select": 6,
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"cpld_device": "urukul1_cpld"
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}
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},
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"urukul1_ch3": {
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"type": "local",
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"module": "artiq.coredevice.ad9910",
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"class": "AD9910",
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"arguments": {
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"pll_n": 40,
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"chip_select": 7,
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"cpld_device": "urukul1_cpld"
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}
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},
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"spi_zotino0": {
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 37}
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},
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"ttl_zotino0_ldac": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 38}
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},
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"ttl_zotino0_clr": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 39}
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},
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"zotino0": {
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"type": "local",
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"module": "artiq.coredevice.zotino",
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"class": "Zotino",
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"arguments": {
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"spi_device": "spi_zotino0",
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"ldac_device": "ttl_zotino0_ldac",
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"clr_device": "ttl_zotino0_clr"
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}
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}
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}
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@ -148,32 +148,30 @@ class StandaloneBase(MiniSoC, AMPSoC):
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self.csr_devices.append("rtio_analyzer")
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class Opticlock(StandaloneBase):
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class Tester(StandaloneBase):
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"""
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Opticlock extension variant configuration
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Configuration for CI tests. Contains the maximum number of different EEMs.
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"""
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def __init__(self, hw_rev=None, **kwargs):
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if hw_rev is None:
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hw_rev = "v1.0"
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hw_rev = "v1.1"
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StandaloneBase.__init__(self, hw_rev=hw_rev, **kwargs)
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self.config["SI5324_AS_SYNTHESIZER"] = None
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self.config["SI5324_EXT_REF"] = None
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self.config["EXT_REF_FREQUENCY"] = "100.0"
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# self.config["SI5324_EXT_REF"] = None
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self.config["RTIO_FREQUENCY"] = "125.0"
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if hw_rev == "v1.0":
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# EEM clock fan-out from Si5324, not MMCX
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self.comb += self.platform.request("clk_sel").eq(1)
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self.rtio_channels = []
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eem.DIO.add_std(self, 0,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 1,
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 2,
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.Novogorny.add_std(self, 3, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 5, 4, ttl_serdes_7series.Output_8X)
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eem.DIO.add_std(self, 5,
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ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X,
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edge_counter_cls=edge_counter.SimpleEdgeCounter)
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eem.Urukul.add_std(self, 0, 1, ttl_serdes_7series.Output_8X,
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ttl_simple.ClockGen)
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eem.Sampler.add_std(self, 3, 2, ttl_serdes_7series.Output_8X)
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eem.Zotino.add_std(self, 4, ttl_serdes_7series.Output_8X)
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for i in (1, 2):
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sfp_ctl = self.platform.request("sfp_ctl", i)
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@ -181,14 +179,9 @@ class Opticlock(StandaloneBase):
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self.submodules += phy
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self.rtio_channels.append(rtio.Channel.from_phy(phy))
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eem.Urukul.add_std(self, 6, None, ttl_serdes_7series.Output_8X,
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ttl_simple.ClockGen)
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eem.Zotino.add_std(self, 7, ttl_serdes_7series.Output_8X)
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self.config["HAS_RTIO_LOG"] = None
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self.config["RTIO_LOG_CHANNEL"] = len(self.rtio_channels)
|
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self.rtio_channels.append(rtio.LogChannel())
|
||||
|
||||
self.add_rtio(self.rtio_channels)
|
||||
|
||||
|
||||
|
|
@ -239,43 +232,6 @@ class SUServo(StandaloneBase):
|
|||
pads.clkout, self.crg.cd_sys.clk)
|
||||
|
||||
|
||||
class Tester(StandaloneBase):
|
||||
"""
|
||||
Configuration for CI tests. Contains the maximum number of different EEMs.
|
||||
"""
|
||||
def __init__(self, hw_rev=None, **kwargs):
|
||||
if hw_rev is None:
|
||||
hw_rev = "v1.1"
|
||||
StandaloneBase.__init__(self, hw_rev=hw_rev, **kwargs)
|
||||
|
||||
self.config["SI5324_AS_SYNTHESIZER"] = None
|
||||
# self.config["SI5324_EXT_REF"] = None
|
||||
self.config["RTIO_FREQUENCY"] = "125.0"
|
||||
if hw_rev == "v1.0":
|
||||
# EEM clock fan-out from Si5324, not MMCX
|
||||
self.comb += self.platform.request("clk_sel").eq(1)
|
||||
|
||||
self.rtio_channels = []
|
||||
eem.DIO.add_std(self, 5,
|
||||
ttl_serdes_7series.InOut_8X, ttl_serdes_7series.Output_8X,
|
||||
edge_counter_cls=edge_counter.SimpleEdgeCounter)
|
||||
eem.Urukul.add_std(self, 0, 1, ttl_serdes_7series.Output_8X,
|
||||
ttl_simple.ClockGen)
|
||||
eem.Sampler.add_std(self, 3, 2, ttl_serdes_7series.Output_8X)
|
||||
eem.Zotino.add_std(self, 4, ttl_serdes_7series.Output_8X)
|
||||
|
||||
for i in (1, 2):
|
||||
sfp_ctl = self.platform.request("sfp_ctl", i)
|
||||
phy = ttl_simple.Output(sfp_ctl.led)
|
||||
self.submodules += phy
|
||||
self.rtio_channels.append(rtio.Channel.from_phy(phy))
|
||||
|
||||
self.config["HAS_RTIO_LOG"] = None
|
||||
self.config["RTIO_LOG_CHANNEL"] = len(self.rtio_channels)
|
||||
self.rtio_channels.append(rtio.LogChannel())
|
||||
self.add_rtio(self.rtio_channels)
|
||||
|
||||
|
||||
class _RTIOClockMultiplier(Module, AutoCSR):
|
||||
def __init__(self, rtio_clk_freq):
|
||||
self.pll_reset = CSRStorage(reset=1)
|
||||
|
|
@ -662,9 +618,7 @@ class Satellite(SatelliteBase):
|
|||
self.add_rtio(self.rtio_channels)
|
||||
|
||||
|
||||
VARIANTS = {cls.__name__.lower(): cls for cls in [
|
||||
Opticlock, SUServo,
|
||||
Tester, Master, Satellite]}
|
||||
VARIANTS = {cls.__name__.lower(): cls for cls in [Tester, SUServo, Master, Satellite]}
|
||||
|
||||
|
||||
def main():
|
||||
|
|
@ -673,7 +627,7 @@ def main():
|
|||
builder_args(parser)
|
||||
soc_kasli_args(parser)
|
||||
parser.set_defaults(output_dir="artiq_kasli")
|
||||
parser.add_argument("-V", "--variant", default="opticlock",
|
||||
parser.add_argument("-V", "--variant", default="tester",
|
||||
help="variant: {} (default: %(default)s)".format(
|
||||
"/".join(sorted(VARIANTS.keys()))))
|
||||
args = parser.parse_args()
|
||||
|
|
|
|||
Loading…
Reference in New Issue