forked from M-Labs/artiq
1
0
Fork 0

firmware: Rename si5324 crystal_{ref -> as_ckin2} [nfc]

This would have made the issue in the pre-740543d4e code
much more obvious (the config option by itself does not
have any effect on the choice of active reference input).
This commit is contained in:
David Nadlinger 2022-12-17 02:09:20 +00:00
parent ceabeb8d84
commit 1e0102379b
3 changed files with 13 additions and 13 deletions

View File

@ -28,7 +28,7 @@ pub struct FrequencySettings {
pub n31: u32, pub n31: u32,
pub n32: u32, pub n32: u32,
pub bwsel: u8, pub bwsel: u8,
pub crystal_ref: bool pub crystal_as_ckin2: bool
} }
pub enum Input { pub enum Input {
@ -83,7 +83,7 @@ fn map_frequency_settings(settings: &FrequencySettings) -> Result<FrequencySetti
n31: settings.n31 - 1, n31: settings.n31 - 1,
n32: settings.n32 - 1, n32: settings.n32 - 1,
bwsel: settings.bwsel, bwsel: settings.bwsel,
crystal_ref: settings.crystal_ref crystal_as_ckin2: settings.crystal_as_ckin2
}; };
Ok(r) Ok(r)
} }
@ -223,7 +223,7 @@ pub fn setup(settings: &FrequencySettings, input: Input) -> Result<()> {
}; };
init()?; init()?;
if settings.crystal_ref { if settings.crystal_as_ckin2 {
write(0, read(0)? | 0x40)?; // FREE_RUN=1 write(0, read(0)? | 0x40)?; // FREE_RUN=1
} }
write(2, (read(2)? & 0x0f) | (s.bwsel << 4))?; write(2, (read(2)? & 0x0f) | (s.bwsel << 4))?;

View File

@ -142,7 +142,7 @@ fn setup_si5324_as_synthesizer(cfg: RtioClock) {
n31 : 6, n31 : 6,
n32 : 6, n32 : 6,
bwsel : 4, bwsel : 4,
crystal_ref: false crystal_as_ckin2: false
}, },
SI5324_EXT_INPUT SI5324_EXT_INPUT
) )
@ -158,7 +158,7 @@ fn setup_si5324_as_synthesizer(cfg: RtioClock) {
n31 : 52, n31 : 52,
n32 : 52, n32 : 52,
bwsel : 4, bwsel : 4,
crystal_ref: false crystal_as_ckin2: false
}, },
SI5324_EXT_INPUT SI5324_EXT_INPUT
) )
@ -174,7 +174,7 @@ fn setup_si5324_as_synthesizer(cfg: RtioClock) {
n31 : 63, n31 : 63,
n32 : 63, n32 : 63,
bwsel : 4, bwsel : 4,
crystal_ref: false crystal_as_ckin2: false
}, },
SI5324_EXT_INPUT SI5324_EXT_INPUT
) )
@ -190,7 +190,7 @@ fn setup_si5324_as_synthesizer(cfg: RtioClock) {
n31 : 7139, n31 : 7139,
n32 : 7139, n32 : 7139,
bwsel : 3, bwsel : 3,
crystal_ref: true crystal_as_ckin2: true
}, },
si5324::Input::Ckin2 si5324::Input::Ckin2
) )
@ -206,7 +206,7 @@ fn setup_si5324_as_synthesizer(cfg: RtioClock) {
n31 : 7139, n31 : 7139,
n32 : 7139, n32 : 7139,
bwsel : 3, bwsel : 3,
crystal_ref: true crystal_as_ckin2: true
}, },
si5324::Input::Ckin2 si5324::Input::Ckin2
) )
@ -222,7 +222,7 @@ fn setup_si5324_as_synthesizer(cfg: RtioClock) {
n31 : 4565, n31 : 4565,
n32 : 4565, n32 : 4565,
bwsel : 4, bwsel : 4,
crystal_ref: true crystal_as_ckin2: true
}, },
si5324::Input::Ckin2 si5324::Input::Ckin2
) )
@ -238,7 +238,7 @@ fn setup_si5324_as_synthesizer(cfg: RtioClock) {
n31 : 4565, n31 : 4565,
n32 : 4565, n32 : 4565,
bwsel : 4, bwsel : 4,
crystal_ref: true crystal_as_ckin2: true
}, },
si5324::Input::Ckin2 si5324::Input::Ckin2
) )

View File

@ -436,7 +436,7 @@ const SI5324_SETTINGS: si5324::FrequencySettings
n31 : 75, n31 : 75,
n32 : 75, n32 : 75,
bwsel : 4, bwsel : 4,
crystal_ref: true crystal_as_ckin2: true
}; };
#[cfg(all(has_si5324, rtio_frequency = "125.0"))] #[cfg(all(has_si5324, rtio_frequency = "125.0"))]
@ -449,7 +449,7 @@ const SI5324_SETTINGS: si5324::FrequencySettings
n31 : 63, n31 : 63,
n32 : 63, n32 : 63,
bwsel : 4, bwsel : 4,
crystal_ref: true crystal_as_ckin2: true
}; };
#[cfg(all(has_si5324, rtio_frequency = "100.0"))] #[cfg(all(has_si5324, rtio_frequency = "100.0"))]
@ -462,7 +462,7 @@ const SI5324_SETTINGS: si5324::FrequencySettings
n31 : 50, n31 : 50,
n32 : 50, n32 : 50,
bwsel : 4, bwsel : 4,
crystal_ref: true crystal_as_ckin2: true
}; };
#[no_mangle] #[no_mangle]