forked from M-Labs/artiq
firmware: make DAC initialization failures non-fatal
This allows using RTMs with one broken DAC for development.
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158b5e3083
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1d594d0c97
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@ -720,12 +720,7 @@ fn dac_sysref_cfg(dacno: u8, phase: u16) {
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hmc7043::cfg_dac_sysref(dacno, phase);
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hmc7043::cfg_dac_sysref(dacno, phase);
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}
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}
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pub fn init() -> Result<(), &'static str> {
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fn init_dac(dacno: u8) -> Result<(), &'static str> {
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// Release the JESD clock domain reset late, as we need to
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// set up clock chips before.
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jesd_unreset();
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for dacno in 0..csr::AD9154.len() {
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let dacno = dacno as u8;
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let dacno = dacno as u8;
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// Reset the DAC, detect and configure it
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// Reset the DAC, detect and configure it
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dac_reset(dacno);
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dac_reset(dacno);
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@ -738,7 +733,18 @@ pub fn init() -> Result<(), &'static str> {
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// Set SYSREF phase and reconfigure the DAC
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// Set SYSREF phase and reconfigure the DAC
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dac_sysref_cfg(dacno, 88);
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dac_sysref_cfg(dacno, 88);
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dac_cfg_retry(dacno)?;
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dac_cfg_retry(dacno)?;
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}
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Ok(())
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Ok(())
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}
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}
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pub fn init() {
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// Release the JESD clock domain reset late, as we need to
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// set up clock chips before.
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jesd_unreset();
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for dacno in 0..csr::AD9154.len() {
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match init_dac(dacno as u8) {
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Ok(_) => (),
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Err(e) => error!("failed to initialize AD9154-{}: {}", dacno, e)
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}
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}
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}
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@ -109,7 +109,7 @@ fn startup() {
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/* must be the first SPI init because of HMC830 SPI mode selection */
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/* must be the first SPI init because of HMC830 SPI mode selection */
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board_artiq::hmc830_7043::init().expect("cannot initialize HMC830/7043");
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board_artiq::hmc830_7043::init().expect("cannot initialize HMC830/7043");
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#[cfg(has_ad9154)]
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#[cfg(has_ad9154)]
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board_artiq::ad9154::init().expect("cannot initialize AD9154");
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board_artiq::ad9154::init();
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#[cfg(has_allaki_atts)]
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#[cfg(has_allaki_atts)]
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board_artiq::hmc542::program_all(8/*=4dB*/);
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board_artiq::hmc542::program_all(8/*=4dB*/);
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