srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

examples: dds_bus -> core_dds

This commit is contained in:
Sebastien Bourdeauducq 2016-03-09 23:27:41 +08:00
parent 861c4a9ae5
commit 1c706fae49
2 changed files with 4 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
examples/master/repository/coredevice_examples/photon_histogram.py
View File

@ -6,7 +6,7 @@ class PhotonHistogram(EnvExperiment):
def build(self): def build(self):
self.setattr_device("core") self.setattr_device("core")
self.setattr_device("dds_bus") self.setattr_device("core_dds")
self.setattr_device("bd_dds") self.setattr_device("bd_dds")
self.setattr_device("bd_sw") self.setattr_device("bd_sw")
self.setattr_device("bdd_dds") self.setattr_device("bdd_dds")
@ -22,7 +22,7 @@ class PhotonHistogram(EnvExperiment):
@kernel @kernel
def program_cooling(self): def program_cooling(self):
with self.dds_bus.batch: with self.core_dds.batch:
self.bd_dds.set(200*MHz) self.bd_dds.set(200*MHz)
self.bdd_dds.set(300*MHz) self.bdd_dds.set(300*MHz)

4
examples/master/repository/coredevice_examples/simple/dds_test.py
View File

@ -6,7 +6,7 @@ class DDSTest(EnvExperiment):
def build(self): def build(self):
self.setattr_device("core") self.setattr_device("core")
self.setattr_device("dds_bus") self.setattr_device("core_dds")
self.setattr_device("dds0") self.setattr_device("dds0")
self.setattr_device("dds1") self.setattr_device("dds1")
self.setattr_device("dds2") self.setattr_device("dds2")
@ -17,7 +17,7 @@ class DDSTest(EnvExperiment):
@kernel @kernel
def run(self): def run(self):
with self.dds_bus.batch: with self.core_dds.batch:
self.dds1.set(120*MHz) self.dds1.set(120*MHz)
self.dds2.set(200*MHz) self.dds2.set(200*MHz)
delay(1*us) delay(1*us)