forked from M-Labs/artiq
analyzer: fix byte_count (again)
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@ -199,9 +199,9 @@ class DMAWriter(Module, AutoCSR):
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)
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]
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message_count = Signal(32 - log2_int(message_len))
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message_count = Signal(32 - log2_int(message_len//8))
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self.comb += self.byte_count.status.eq(
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message_count << log2_int(message_len))
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message_count << log2_int(message_len//8))
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self.sync += [
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If(self.reset.re, message_count.eq(0)),
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If(membus.ack, message_count.eq(
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