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sayma/serwb: re-enable scrambling

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Florent Kermarrec 2018-04-17 00:49:36 +02:00
parent ca01c8f1cb
commit 1acd7ea1db
2 changed files with 2 additions and 2 deletions
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2
artiq/gateware/targets/sayma_amc.py
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@ -174,7 +174,7 @@ class Standalone(MiniSoC, AMPSoC):
self.submodules.serwb_phy_amc = serwb_phy_amc
self.csr_devices.append("serwb_phy_amc")
serwb_core = serwb.core.SERWBCore(serwb_phy_amc, int(self.clk_freq), mode="slave", with_scrambling=False)
serwb_core = serwb.core.SERWBCore(serwb_phy_amc, int(self.clk_freq), mode="slave", with_scrambling=True)
self.submodules += serwb_core
self.add_wb_slave(self.mem_map["serwb"], 8192, serwb_core.etherbone.wishbone.bus)

2
artiq/gateware/targets/sayma_rtm.py
View File

@ -161,7 +161,7 @@ class SaymaRTM(Module):
self.comb += self.crg.serwb_refclk.eq(serwb_phy_rtm.serdes.refclk)
csr_devices.append("serwb_phy_rtm")
serwb_core = serwb.core.SERWBCore(serwb_phy_rtm, int(clk_freq), mode="master", with_scrambling=False)
serwb_core = serwb.core.SERWBCore(serwb_phy_rtm, int(clk_freq), mode="master", with_scrambling=True)
self.submodules += serwb_core
# process CSR devices and connect them to serwb