forked from M-Labs/artiq
ad9914: fix set_mu
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@ -174,20 +174,18 @@ class AD9914:
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self.phase_mode = phase_mode
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@kernel
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def set_mu(self, frequency, phase=0, phase_mode=_PHASE_MODE_DEFAULT,
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amplitude=0x0fff, ref_time=-1):
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def set_mu(self, ftw, pow=0, phase_mode=_PHASE_MODE_DEFAULT,
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asf=0x0fff, ref_time=-1):
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"""Sets the DDS channel to the specified frequency and phase.
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This uses machine units (FTW and POW). The frequency tuning word width
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is 32, whereas the phase offset word width depends on the type of DDS
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chip and can be retrieved via the ``pow_width`` attribute. The amplitude
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width is 12.
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is 32, and the phase offset word width is 16.
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The "frequency update" pulse is sent to the DDS with a fixed latency
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with respect to the current position of the time cursor.
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:param frequency: frequency to generate.
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:param phase: adds an offset, in turns, to the phase.
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:param ftw: frequency to generate.
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:param pow: adds an offset to the phase.
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:param phase_mode: if specified, overrides the default phase mode set
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by ``set_phase_mode`` for this call.
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:param ref_time: reference time used to compute phase. Specifying this
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@ -223,7 +221,7 @@ class AD9914:
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self.continuous_phase_comp = pow
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self.write(AD9914_REG_POW, pow)
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self.write(AD9914_REG_ASF, amplitude)
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self.write(AD9914_REG_ASF, asf)
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self.write(AD9914_FUD, 0)
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@portable(flags={"fast-math"})
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