srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

wrpll: style

This commit is contained in:
Sebastien Bourdeauducq 2020-10-08 15:00:49 +08:00
parent ebb7ccbfd1
commit 17c952b8fb
1 changed files with 2 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
artiq/gateware/drtio/wrpll/ddmtd.py
View File

@ -234,7 +234,6 @@ class Collector(Module):
def test_collector_main(): def test_collector_main():
N = 2 N = 2
collector = Collector(N=N) collector = Collector(N=N)
# check collector phase unwrapping # check collector phase unwrapping
@ -277,7 +276,6 @@ def test_collector_main():
def test_collector_helper(): def test_collector_helper():
N = 3 N = 3
collector = Collector(N=N) collector = Collector(N=N)
# check collector phase unwrapping # check collector phase unwrapping
@ -304,6 +302,7 @@ def test_collector_helper():
run_simulation(collector, generator()) run_simulation(collector, generator())
if __name__ == "__main__": if __name__ == "__main__":
test_collector_main() test_collector_main()
test_collector_helper() test_collector_helper()