From 16537d347e094b5fd454df0d4c85187f81e80756 Mon Sep 17 00:00:00 2001 From: Robert Jordens Date: Mon, 29 Feb 2016 19:48:26 +0100 Subject: [PATCH] coredevice.spi: cleanup --- artiq/coredevice/spi.py | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/artiq/coredevice/spi.py b/artiq/coredevice/spi.py index d6ebeb7db..330ddd168 100644 --- a/artiq/coredevice/spi.py +++ b/artiq/coredevice/spi.py @@ -1,4 +1,5 @@ -from artiq.language.core import * +from artiq.language.core import (kernel, portable, seconds_to_mu, now_mu, + delay_mu) from artiq.language.units import MHz from artiq.coredevice.rt2wb import rt2wb_write, rt2wb_read_sync @@ -83,6 +84,11 @@ class SPIMaster: SPI_RT2WB_READ, int(2*self.ref_period_mu)) @kernel - def get_config_sync(self): + def _get_config_sync(self): return rt2wb_read_sync(now_mu(), self.channel, SPI_CONFIG_ADDR | SPI_RT2WB_READ, int(2*self.ref_period_mu)) + + @kernel + def _get_xfer_sync(self): + return rt2wb_read_sync(now_mu(), self.channel, SPI_XFER_ADDR | + SPI_RT2WB_READ, int(2*self.ref_period_mu))