forked from M-Labs/artiq
sed: reset `valid` in output sorter
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0635907699
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@ -56,9 +56,12 @@ class OutputNetwork(Module):
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step_input = self.input
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for step in boms_steps_pairs(lane_count):
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step_output = [Record(layouts.output_network_node(seqn_width, layout_payload),
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reset_less=True)
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for _ in range(lane_count)]
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step_output = []
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for i in range(lane_count):
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rec = Record(layouts.output_network_node(seqn_width, layout_payload),
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reset_less=True)
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rec.valid.reset_less = False
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step_output.append(rec)
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for node1, node2 in step:
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nondata_difference = Signal()
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