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phaser: support core stpl

This commit is contained in:
Robert Jördens 2016-10-12 12:03:29 +02:00
parent f515c11f26
commit 1117fe191b
5 changed files with 16 additions and 9 deletions

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@ -42,6 +42,11 @@ def ad9154_jesd_prbs(prbs: TInt32) -> TNone:
raise NotImplementedError("syscall not simulated")
@syscall(flags={"nounwind", "nowrite"})
def ad9154_jesd_stpl(prbs: TInt32) -> TNone:
raise NotImplementedError("syscall not simulated")
class AD9154:
"""AD9154-FMC-EBZ SPI support
@ -95,3 +100,7 @@ class AD9154:
@kernel
def jesd_prbs(self, prbs):
ad9154_jesd_prbs(prbs)
@kernel
def jesd_stpl(self, enable):
ad9154_jesd_stpl(enable)

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@ -544,15 +544,6 @@ class Phaser(_NIST_Ions):
# while at 5 GBps, take every second sample... FIXME
self.comb += conv.eq(Cat(ch.o[::2]))
if False:
# short transport layer test pattern
self.comb += [
self.ad9154.jesd_core.transport.sink.converter0.eq(0x01230123),
self.ad9154.jesd_core.transport.sink.converter1.eq(0x45674567),
self.ad9154.jesd_core.transport.sink.converter2.eq(0x89ab89ab),
self.ad9154.jesd_core.transport.sink.converter3.eq(0xcdefcdef)
]
self.comb += jesd_sync.eq(self.ad9154.jesd_sync)

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@ -69,4 +69,9 @@ void ad9154_jesd_prbs(int p)
ad9154_jesd_control_prbs_config_write(p);
}
void ad9154_jesd_stpl(int en)
{
ad9154_jesd_control_stpl_enable_write(en);
}
#endif /* CONFIG_AD9154_DAC_CS */

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@ -13,6 +13,7 @@ uint8_t ad9516_read(uint16_t addr);
void ad9154_jesd_enable(int en);
int ad9154_jesd_ready(void);
void ad9154_jesd_prbs(int p);
void ad9154_jesd_stpl(int en);
#endif
#endif

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@ -147,6 +147,7 @@ static const struct symbol runtime_exports[] = {
{"ad9154_jesd_enable", &ad9154_jesd_enable},
{"ad9154_jesd_ready", &ad9154_jesd_ready},
{"ad9154_jesd_prbs", &ad9154_jesd_prbs},
{"ad9154_jesd_stpl", &ad9154_jesd_stpl},
#endif
/* end */