srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

artiq_run: style

This commit is contained in:
Sebastien Bourdeauducq 2016-04-12 15:16:48 +08:00
parent 3134106a11
commit 0cca2bbef6
1 changed files with 9 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
artiq/frontend/artiq_run.py
View File

@ -20,12 +20,15 @@ from artiq.compiler.embedding import ObjectMap
from artiq.compiler.targets import OR1KTarget
from artiq.tools import *
logger = logging.getLogger(__name__)
class StubObject:
def __setattr__(self, name, value):
pass
class StubObjectMap:
def __init__(self):
stub_object = StubObject()
@ -40,6 +43,7 @@ class StubObjectMap:
self.forward_map[self.next_id] = value
self.next_id -= 1
class FileRunner(EnvExperiment):
def build(self):
self.setattr_device("core")
@ -54,18 +58,21 @@ class FileRunner(EnvExperiment):
self.core.comm.serve(StubObjectMap(),
lambda addresses: self.target.symbolize(kernel_library, addresses))
class ELFRunner(FileRunner):
def compile(self):
with open(self.file, "rb") as f:
return f.read()
class LLVMIRRunner(FileRunner):
def compile(self):
with open(self.file, "r") as f:
llmodule = llvm.parse_assembly(f.read())
llmodule.verify()
return self.target.link([self.target.assemble(llmodule)],
init_fn='__modinit__')
init_fn="__modinit__")
class LLVMBitcodeRunner(FileRunner):
def compile(self):
@ -73,7 +80,7 @@ class LLVMBitcodeRunner(FileRunner):
llmodule = llvm.parse_bitcode(f.read())
llmodule.verify()
return self.target.link([self.target.assemble(llmodule)],
init_fn='__modinit__')
init_fn="__modinit__")
class DummyScheduler: