forked from M-Labs/artiq
ad53xx: style [nfc]
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@ -13,6 +13,7 @@ from artiq.language.core import (kernel, portable, delay_mu, delay, now_mu,
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from artiq.language.units import ns
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from artiq.coredevice import spi2 as spi
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SPI_AD53XX_CONFIG = (0*spi.SPI_OFFLINE | 1*spi.SPI_END |
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0*spi.SPI_INPUT | 0*spi.SPI_CS_POLARITY |
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0*spi.SPI_CLK_POLARITY | 1*spi.SPI_CLK_PHASE |
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@ -67,7 +68,7 @@ def ad53xx_cmd_read_ch(channel, op):
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a 32-bit integer, ready to be transferred directly by the SPI core.
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"""
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return (AD53XX_CMD_SPECIAL | AD53XX_SPECIAL_READ | op |
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(((channel & 0x3f) + 8) << 7)) << 8
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(((channel & 0x3f) + 8) << 7)) << 8
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@portable
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@ -82,6 +83,7 @@ def voltage_to_mu(voltage, offset_dacs=8192, vref=5.):
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"""
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return int(round(0x10000*(voltage/(4.*vref)) + offset_dacs*0x4))
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@portable
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def offset_to_mu(voltage, offset_dacs=8192, vref=5.):
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"""Returns the offset register value required to produce a given voltage
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@ -96,6 +98,7 @@ def offset_to_mu(voltage, offset_dacs=8192, vref=5.):
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"""
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return int(round(0x10000*(voltage/(4.*vref)) + offset_dacs*0x4))
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class AD53xx:
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"""Analog devices AD53[67][0123] family of multi-channel Digital to Analog
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Converters.
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@ -252,7 +255,7 @@ class AD53xx:
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This method advances the timeline by two RTIO clock periods.
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"""
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self.ldac.off()
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delay_mu(2*self.bus.ref_period_mu) # t13 = 10ns ldac pulse width low
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delay_mu(2*self.bus.ref_period_mu) # t13 = 10ns ldac pulse width low
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self.ldac.on()
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@kernel
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