forked from M-Labs/artiq
gateware/rtio: add LogChannel
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parent
9ba8dfbf23
commit
080752092c
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@ -1,3 +1,3 @@
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from artiq.gateware.rtio.core import Channel, RTIO
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from artiq.gateware.rtio.core import Channel, LogChannel, RTIO
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from artiq.gateware.rtio.analyzer import Analyzer
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from artiq.gateware.rtio.analyzer import Analyzer
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from artiq.gateware.rtio.moninj import MonInj
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from artiq.gateware.rtio.moninj import MonInj
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@ -310,6 +310,15 @@ class Channel:
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return cls(phy.rtlink, probes, overrides, **kwargs)
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return cls(phy.rtlink, probes, overrides, **kwargs)
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class LogChannel:
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"""A degenerate channel used to log messages into the analyzer."""
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def __init__(self):
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self.interface = rtlink.Interface(
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rtlink.OInterface(32, suppress_nop=False))
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self.probes = []
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self.overrides = []
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class _KernelCSRs(AutoCSR):
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class _KernelCSRs(AutoCSR):
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def __init__(self, chan_sel_width,
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def __init__(self, chan_sel_width,
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data_width, address_width, full_ts_width):
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data_width, address_width, full_ts_width):
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@ -385,6 +394,12 @@ class RTIO(Module):
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o_statuses, i_statuses = [], []
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o_statuses, i_statuses = [], []
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sel = self.kcsrs.chan_sel.storage
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sel = self.kcsrs.chan_sel.storage
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for n, channel in enumerate(channels):
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for n, channel in enumerate(channels):
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if isinstance(channel, LogChannel):
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i_datas.append(0)
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i_timestamps.append(0)
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i_statuses.append(0)
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continue
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selected = Signal()
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selected = Signal()
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self.comb += selected.eq(sel == n)
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self.comb += selected.eq(sel == n)
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